Package: fpga-peppercorn Source: prjpeppercorn Version: 1.12-1~bpo12+1~sjr Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 466 Depends: libboost-program-options1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.0), libstdc++6 (>= 11) Homepage: https://github.com/YosysHQ/prjpeppercorn Priority: optional Section: electronics Filename: pool/main/p/prjpeppercorn/fpga-peppercorn_1.12-1~bpo12+1~sjr_riscv64.deb Size: 111320 SHA256: 42e49fc02c537982ba82ca179ac0789644ce3d87e07089aa6a2ceb5333e4c6a1 SHA1: 9ffd2d5b4b5637df74887e691f185610056e6fbb MD5sum: 95478bd03b46175c07ffcafbec24afde Description: Tools for interacting with Cologne Chip GateMate FPGA bitstreams Project Peppercorn provides documentation and tools for the bitstream used by Cologne Chip "GateMate" FPGAs. . This package contains tools for producing and analyzing bitstreams. Package: fpga-peppercorn-dbgsym Source: prjpeppercorn Version: 1.12-1~bpo12+1~sjr Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 2129 Depends: fpga-peppercorn (= 1.12-1~bpo12+1~sjr) Priority: optional Section: debug Filename: pool/main/p/prjpeppercorn/fpga-peppercorn-dbgsym_1.12-1~bpo12+1~sjr_riscv64.deb Size: 2016296 SHA256: 35000fbae2d2b0521f5b164d68f7127c356865d5eee5e630d1e78f9973e758d1 SHA1: 5476f2267a92e5f49a25c8fc73fc5978483fa04a MD5sum: bd1f3f34ffa1a6dd6471d8721ecdd118 Description: debug symbols for fpga-peppercorn Build-Ids: 8ca6c91c27e5700af62e819232f1972ec6a220e4 b156d1c8e546e48a9d6540cf1afb4452ef4f0206 Package: fpga-peppercorn-delay Source: prjpeppercorn Version: 1.12-1~bpo12+1~sjr Architecture: all Maintainer: Debian Electronics Team Installed-Size: 4902 Homepage: https://github.com/YosysHQ/prjpeppercorn Priority: optional Section: electronics Filename: pool/main/p/prjpeppercorn/fpga-peppercorn-delay_1.12-1~bpo12+1~sjr_all.deb Size: 4165584 SHA256: 68bfc447d16c27af0b5c8a42c28c3c20754e540afa3aace6b3bf1d73cd6f8595 SHA1: 5b038d3e46fd48bdb696fc89feac534b4577e6ea MD5sum: 063fbbcd050c7609831b43bfae104380 Description: Propagation Delay Database for Cologne Chip GateMate FPGA bitstreams Project Peppercorn provides documentation and tools for the bitstream used by Cologne Chip "GateMate" FPGAs. . This package contains the expected best/typical/worst timings, as published by the manufacturer. Package: fpga-trellis Source: prjtrellis Version: 1.4-2~bpo12+1 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 1398 Depends: libboost-filesystem1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.4), libstdc++6 (>= 11), fpga-trellis-database Homepage: https://github.com/YosysHQ/prjtrellis Priority: optional Section: electronics Filename: pool/main/p/prjtrellis/fpga-trellis_1.4-2~bpo12+1_riscv64.deb Size: 419848 SHA256: 67bbef38b32b30f0bd1bca322e5f2f408f6c1cd80b49cf36520f3dca553697d7 SHA1: 3e5e1704279c262895b5bbd82546fd4db7feaf2f MD5sum: 9d33e2b4f4f6dea8e5bb1db25b5d291f Description: Tools for interacting with Lattice ECP5 FPGA bitstreams Project Trellis provides documentation and tools for the bitstream used by Lattice ECP5 series FPGAs. . This package contains tools for producing and analyzing bitstreams. Package: fpga-trellis-database Source: prjtrellis Version: 1.4-2~bpo12+1 Architecture: all Maintainer: Debian Electronics Team Installed-Size: 75917 Homepage: https://github.com/YosysHQ/prjtrellis Priority: optional Section: electronics Filename: pool/main/p/prjtrellis/fpga-trellis-database_1.4-2~bpo12+1_all.deb Size: 951208 SHA256: 536ed777bc908f366edcb17587e0a090c9638c797da69047c69af873abc57858 SHA1: 6a6159937008dc3b9ed373d963e6c14581c95d8e MD5sum: fa1a380858380d5ccb75555517592e72 Description: Lattice ECP5 FPGA bitstream database Project Trellis provides documentation and tools for the bitstream used by Lattice ECP5 series FPGAs. . This package contains the machine readable bitstream descriptions. Package: fpga-trellis-dbgsym Source: prjtrellis Version: 1.4-2~bpo12+1 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 6639 Depends: fpga-trellis (= 1.4-2~bpo12+1) Priority: optional Section: debug Filename: pool/main/p/prjtrellis/fpga-trellis-dbgsym_1.4-2~bpo12+1_riscv64.deb Size: 6381448 SHA256: 607c4b5deeb14792d54913cadaea90a76f21700040867e3c0fb4aa51115665c7 SHA1: b8f508f8dc6a2369c692d6d5e9a954f467523eb6 MD5sum: 64cee8d7a19ca5237795501f98d106ae Description: debug symbols for fpga-trellis Build-Ids: 3f1b09c24cebfcd6ea33fe8aab72182569d09f36 4de5a63255447fc1bd0c1233f5f2a54988a76836 5f6a6aebfadfc437f36fdf1befd91dd696c087ff 6fac67379aff89d31cc115bbf7270ecf4dc0255e b3646e6c09ba4c2d7561cd6df5acd5f13997fc7c e125a59425510145a015fcb9e114a97a899bb8eb Package: iverilog Version: 12.0-2~bpo12+1 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 6123 Depends: libbz2-1.0, libc6 (>= 2.34), libgcc-s1 (>= 3.4), libreadline8 (>= 6.0), libstdc++6 (>= 11), zlib1g (>= 1:1.2.0) Suggests: gtkwave Breaks: verilog (<< 10.2-1.1~) Replaces: verilog (<< 10.2-1.1~) Provides: verilog Homepage: http://iverilog.icarus.com Priority: optional Section: electronics Filename: pool/main/i/iverilog/iverilog_12.0-2~bpo12+1_riscv64.deb Size: 1924600 SHA256: de3e2b3d74dd4773fe042c0e534e8c306a3421739610814c8991bb158b261625 SHA1: ecb8d6750d163b01e39f1f36bc247c02a4cae3bf MD5sum: 583dddc081b2753aa12536db3f113ccc Description: Icarus verilog compiler Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs. . The compiler can target either simulation, or netlist (EDIF). Package: iverilog-dbgsym Source: iverilog Version: 12.0-2~bpo12+1 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 16078 Depends: iverilog (= 12.0-2~bpo12+1) Priority: optional Section: debug Filename: pool/main/i/iverilog/iverilog-dbgsym_12.0-2~bpo12+1_riscv64.deb Size: 15433500 SHA256: 5d5ed3f4bf3dfc9d44fe4412fef3410d9f052a976d4b1c827ca6929096175b77 SHA1: 8442d3d9628b52778bef33dbe1886e5cadf5b363 MD5sum: 551d1fc5753a9d884cd78127ef802246 Description: debug symbols for iverilog Build-Ids: 0385b89dd4644a6e83d5640bdc113db1f0a1e24a 1816563782f2f8b650d80421698346b74af78619 1912f3646af12f9d0c7dded1918c497f6884053b 1f93ebfe23c939a8265a56abe3c306652f949f9a 262434cfacf35992e4730f0127cf5d30677bcd74 300df68f2ae72d01cf059e63f01729ac730a26f0 346cc1eda0fc37dc198461437b97303ebd059395 3864f8f43ec9060f98fd3b9214191aa41dee54fe 3bda9012866a90ec0cbbf66a5efca3cdcde6282b 493b0b72ee1d271afc7f3a1c469385b064f8ad14 4cd1cd32a2d59ce4e7de0f738ec4f1a60748572d 58cac42cf14ecbe3f826cfa91cab77b1f31fde0f 750ffe39860072c1aa0c93c4040a45ea236fefd7 81baf3e9e1cfbde6102aa2e9e3376dbead99508c 890e7c6939472765b8937e7276a69766c63edb87 91cdbeebc0114dfa987976b0b8e6b69360fad9a3 bcd153061554b31b005c8bb978ea0dc19490df08 d76addbc3e3f85c41a40187ad12490b4d801ea0f da1f143a61695d10127ee71b55de73cab6668952 ee705a83c9d5dc6d12d1658c0612a9bf623345d6 f0444e82825884bbbd185121bc022d1c7038de41 Package: nextpnr-ecp5 Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 2681 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.4), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-ecp5-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-ecp5-qt Replaces: nextpnr-ecp5-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ecp5_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 983672 SHA512: 1cbffb9220882103971f56acbe6a93693d435b29b872e7d3d7ed2af06b064bdc619e64e4d9c461577870f29a9d5fd12ff4215809485408cb7ac414a0bd7f6d99 SHA256: 8fee813e3e0a48450c3b008844bc8b7597c1d68c0f04bb916d3fef4db76629a2 SHA1: 5c2cffb7788b5bdff86c460a5a06d3b4d1f88796 MD5sum: a039a00450b271f9a74c5562ab427e79 Description: FPGA place and route tool for Lattice ECP5 nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-ecp5 supports the Lattice ECP5 series of FPGAs. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-ecp5-qt package. Package: nextpnr-ecp5-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 102547 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ecp5-chipdb_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 2916572 SHA512: fcca3957e3cec94fb49d5270748dc7f11deec99b1c1047edfe0bb63c0a76d0c4ee092affb3d5e356345cbba1049e2d53a77a217c7a54c5c0178293cc5c6a2f11 SHA256: 2c7e6bb22b7edcc0f433ad2ee4c6e554f10563583b673d78ab0b32970b6cdd28 SHA1: 8dc263fe7755792e2248bf8beb98999fd14afa8e MD5sum: e6349571c38b68f3f2d8672352b68027 Description: FPGA place and route tool for Lattice ECP5 -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-ecp5-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 23631 Depends: nextpnr-ecp5 (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-ecp5-dbgsym_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 21664472 SHA512: bfe2d780d84984c794407bf2279aee29da4ee556931f0bf511a65c723e96512522577ab2abef9cf48319267d088cfdedaefc1b8bca21f2dea303164f6d98d951 SHA256: bbd362ce9d08902bc67736c7b237b492181cefd7dc6c09612500dc73ec5d75a2 SHA1: 5efdf0bba5c983d00ea724c5e2d5766477d23387 MD5sum: ed10c860bc6ab6fad3e24f692b6b029b Description: debug symbols for nextpnr-ecp5 Build-Ids: 25d807ed442f215bcb0906aae6d2a5166e4b1ddc Package: nextpnr-ecp5-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 4728 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.4), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-ecp5-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-ecp5 Replaces: nextpnr-ecp5 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ecp5-qt_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 1643464 SHA512: 3fe0157f3575c99fd0d17ca8cef89601924b91e9e7af1e0e7102898224e8c0b6e00f984066d43ce634f58d80a85fa1690ce18de98afb811d096286f839a7617c SHA256: 2ee09f1aaeaa942adb4d8db848686b8d45e67c5e881a441b5508d45b0c90d090 SHA1: 02ab18c025c1c4ae076f39f9045c62340979d9b7 MD5sum: 4a14ab0cd16a8132d60680944a991277 Description: FPGA place and route tool for Lattice ECP5 - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-ecp5 supports the Lattice ECP5 series of FPGAs. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-ecp5 package. Package: nextpnr-ecp5-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 34249 Depends: nextpnr-ecp5-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-ecp5-qt-dbgsym_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 31615904 SHA512: 5ca7e41471a24738f9e49cb55e3a077dd01cfaf0fdbd6d93b093efa47348fc17dcd3ed5cc57d400274ad9f98b89b246c377d05bbb72cfcdcc0d3b60d6552b42a SHA256: ff736cfb1c4b534c8881994855ad2ad14f3589c92097e4c87821d9471daed291 SHA1: 6bccb3416ffdfb62c938421db9447e112cae69a1 MD5sum: cfaa560e6bc6474c949a819673755340 Description: debug symbols for nextpnr-ecp5-qt Build-Ids: c06096f76b7a9f596fb24b1de34849efb050a4b1 Package: nextpnr-generic Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 1796 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.4), libpython3.11 (>= 3.11.0), libstdc++6 (>= 11) Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-generic_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 705452 SHA512: ad1e829f01ed9dae0b096ccc38b6b46fee498ad4ed82971619a5ec25e2d69c738a16ccfb0cc13e98f643356efd5be40070a1b84d222c7f47c899d6b71893257c SHA256: 33f67280f7ef646eceddb5d7895d5b807078dc7c7bbb30beed1dd5bb7365b892 SHA1: e4c5a864b1c0d329c96deab84da0c54d2b8d9c91 MD5sum: 30658f01df90077a4e46c774fc464a2d Description: FPGA place and route tool for Generic FPGAs nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-generic supports nextpnr's synthetic "generic" FPGA. Package: nextpnr-generic-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 21477 Depends: nextpnr-generic (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-generic-dbgsym_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 19597580 SHA512: c4cb13e6e2e9c8910e14315e23def74f9069f9a7b0603b8975ae431cebce580e2402ec02b5b5bd1ae51aa768c8cd8173032a0c1e7b61e01b71e939253369bdf8 SHA256: d654c93d052d157a4d7c1b79d031b233708be343b1501929ecce02d6f14ad731 SHA1: 5e24ec5b991d94302081facde127307e4fe8bdb7 MD5sum: b5afbbba8d5b925bd3e4f0520929c0c8 Description: debug symbols for nextpnr-generic Build-Ids: 5c9b3a433415d442d2007c3623ed1c7b7892a0be Package: nextpnr-gowin Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: all Maintainer: Debian Electronics Team Installed-Size: 25 Depends: nextpnr-himbaechel-gowin Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: oldlibs Filename: pool/main/n/nextpnr/nextpnr-gowin_0.10-6~bpo12+1~sjr2_all.deb Size: 8328 SHA512: b77b998499c3e83bdd8a23a8bb0fbda22fee6f7e91c2093e9e4aab3fa48609d8422d08b4b781a2291621fbbad1b0fd8057388bb6645d1cfbd5a97a68adbfdfb8 SHA256: 6237e6a382c139d63a2ec3dbf7f3d68edbf37da8b60a20336da54fd8a6130eea SHA1: 749345b1d5b3c17dedf02ea92ce385aa102f6428 MD5sum: 274ea915800886f8c51273b5104c301a Description: transitional dummy package -- replaced by nextpnr-himbaechel This is a transitional package. It can safely be removed. Package: nextpnr-gowin-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: all Maintainer: Debian Electronics Team Installed-Size: 24 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: oldlibs Filename: pool/main/n/nextpnr/nextpnr-gowin-chipdb_0.10-6~bpo12+1~sjr2_all.deb Size: 7976 SHA512: fc0e9b93702e3b7b4de6016b45b320dc339f22f24ad602f2f5a0bf6bb15a7721b5c6879a58f00d0947aa6f3d628b8bb84b48b647bc187dba8e6a163c924c075d SHA256: 398f8d816611f5b27cc3fba6737d2b1fdedc700c2a75c781a33a4e9948ef5b23 SHA1: 77148239043b525dd781539429bee69873a1ed6f MD5sum: 1a1dc6681b3fa77e8440d1521ad993bd Description: transitional dummy package -- replaced by nextpnr-himbaechel This is a transitional package. It can safely be removed. Package: nextpnr-gowin-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: all Maintainer: Debian Electronics Team Installed-Size: 24 Depends: nextpnr-himbaechel-gowin-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: oldlibs Filename: pool/main/n/nextpnr/nextpnr-gowin-qt_0.10-6~bpo12+1~sjr2_all.deb Size: 7984 SHA512: c37debbfb70f3973e933694b82a80309d71d23178d2ae67b13db6275b0ad29fca2453c32b7b57f738883b519ac0099830e9dae067281a29587e11c878f42e63b SHA256: 4cd94662b25f2dd22b2fba36836fdd290a61e23fc3398e99afeb66122c7df69d SHA1: d6c60bf5eacbe9c657a11f2e0255a79daa37d617 MD5sum: dff1e7e2c12db96810759080be4c1e60 Description: transitional dummy package -- replaced by nextpnr-himbaechel This is a transitional package. It can safely be removed. Package: nextpnr-himbaechel-gatemate Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 2273 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.4), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-himbaechel-gatemate-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel-gatemate-qt Replaces: nextpnr-himbaechel-gatemate-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 884408 SHA512: 511c42c4076a4e1e0f3cf4597f20d38c877682c25aee01e93f6ba6efcf677c391a42c6967974547cec7afeadaa2577fe376378d1f4bb3ccb4455d239d272dc46 SHA256: 5772ef0e9ec3f40a14f977a65463480f526a5d4a9301dd6a79a6365e7d11f1ed SHA1: 684e7e09b9f1f1a41bd4d25cfd55b6129a3ad281 MD5sum: e924bd66678e6ddf6698e492f367c180 Description: FPGA place and route tool for Cologne Chip GateMate nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-gatemate supports the Cologne Chip GateMate series of FPGAs. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-himbaechel-gatemate-qt package. Package: nextpnr-himbaechel-gatemate-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 29728 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate-chipdb_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 617376 SHA512: b89ccff272b18fdf240be65b470cfbcbdc6ddf398b31e16a716d5d33241db2e72b2bfdf19cc114ca7a8793597ce9082c3036177acf7e8d7f97af6c08fb8c11a8 SHA256: f94d7bdfc5fd3ac8c09047432a339e2dda7defe8b7b5f094090113ab33eeb3f9 SHA1: 7670eb6f371623c62bae9aab9d031b9c4d6a8d3a MD5sum: b6aa8ecd7c947babd2c75f5e662f5657 Description: FPGA place and route tool for Cologne Chip GateMate -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-himbaechel-gatemate-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 24913 Depends: nextpnr-himbaechel-gatemate (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate-dbgsym_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 22702608 SHA512: 2152886f45e1244f9e42b60949270a4e8d94c1760b7f7fe02b0de13a7b88852365a7132a99c65d31dd29fbb4dcf442f8e176f13d1d1113250adbe6a78a573172 SHA256: 0904f38bf3ed8d5de0ba559d74fab91048298b9d6d38b54d62d61b97b8f25dfa SHA1: 3165d7458c9ab9edb2e576c6cf099d018b9fff63 MD5sum: 6b9553eccd4a11aac9fecb3ab2e978e6 Description: debug symbols for nextpnr-himbaechel-gatemate Build-Ids: 602db1f5765d3c3fb186a9ff31d840a680d796e8 Package: nextpnr-himbaechel-gatemate-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 4308 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.4), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-himbaechel-gatemate-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel-gatemate Replaces: nextpnr-himbaechel-gatemate Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate-qt_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 1540000 SHA512: 5c91541c67a1bd782229fd0ff2e4080442e11474d9fa13008690d1c9a361d6fa7bef1d32a9f3fa892d4f0920f1435237a3c999c2da889c930526933d9f2228f0 SHA256: d63b4f98266bdf12a00f98498201df3df6748dfbc1d2d936130aa3b8b89220a4 SHA1: 6d7c9d30d302ec4b5563d0ed5aba3e0e72adbd60 MD5sum: 35a7f1df8fdd06745fa4bd7d4a8b5acb Description: FPGA place and route tool for Cologne Chip GateMate - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-gatemate supports the Cologne Chip GateMate series of FPGAs. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-himbaechel-gatemate package. Package: nextpnr-himbaechel-gatemate-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 35063 Depends: nextpnr-himbaechel-gatemate-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate-qt-dbgsym_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 32168600 SHA512: c41e5d789f3f592e6cdb46747e89c665af64a40faa0b669e01373c65d724fa994905c6151849e973f2fc82f665a8207bc8c1ed39c38d70b8159ff28d223bf99f SHA256: a03aeeeb2fdf00e27f6481d58ff86b2fee9fe3b6e1719b76c2c429baa21f689e SHA1: 911e03c80d68e91a7bdfb45928c01d7d045e17a6 MD5sum: 806c14c7f020a98854eac026a2ab3b69 Description: debug symbols for nextpnr-himbaechel-gatemate-qt Build-Ids: a3278079ca9cac11c5e094da4fdfce14ee43bb2c Package: nextpnr-himbaechel-gowin Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 2169 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.4), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-himbaechel-gowin-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel, nextpnr-himbaechel-gowin-qt, nextpnr-himbaechel-qt Replaces: nextpnr-himbaechel, nextpnr-himbaechel-gowin-qt, nextpnr-himbaechel-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 859880 SHA512: 69c20b40f6336c230700f009180f0ab37fb78cdf1d6da2a2305d2f937210b0c151f7bf580fac0b778a299de15f0898469588333e66da25fa1559bc351a007666 SHA256: 36384220b7ce63beaf566134db8a67fd8d956dd8cafab9b3a7d71dd7dba3b1eb SHA1: 734dcddae5590468c9666845a114ff0e5919c0e2 MD5sum: dc5cf92c47160fbe07626d87beac21af Description: FPGA place and route tool for Gowin GW1N nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-gowin supports the Gowin GW1N series of FPGAs. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-himbaechel-gowin-qt package. Package: nextpnr-himbaechel-gowin-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 172683 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin-chipdb_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 3599716 SHA512: 7ef44dd2ff79ce31d6a7074b8d35962fbd4700bc1a02d46e3c252af47d0c0f90142df300c53ec4c2a5c1b6c28a0adfddb26c6e9af44327e52e5472a12800b3a8 SHA256: c3ae826b725430e893da39fa7eacafc8c9a78a60e8c5ec76caab244540496f21 SHA1: 5fce30d086ec86e73d7145be464bb57b25b41ea8 MD5sum: c881ac78e2304cd1fb926d6906e1acef Description: FPGA place and route tool for Gowin GW1N -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-himbaechel-gowin-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 23222 Depends: nextpnr-himbaechel-gowin (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin-dbgsym_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 21197960 SHA512: 31d663868e93654a39f4245acdaa32b312c04d4ab1e97e47c87ce34c9b4c341820df2902c9cd0b0e573aa065c0b291ea485a2fbdfd812b9ab337ae7d67cea62b SHA256: 643b8d61597285d2941bc5a7a3c3b46736ad1dad59e3413156d1f4dcf29bfc10 SHA1: 80b18e8f077e646b51a0cb6642d74fb3cc075a08 MD5sum: 1e46a7823a2a9788ca810dd8ed624468 Description: debug symbols for nextpnr-himbaechel-gowin Build-Ids: a43f924697e6f951172a75f7e703c440889c4371 Package: nextpnr-himbaechel-gowin-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 4212 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.4), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-himbaechel-gowin-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel, nextpnr-himbaechel-gowin, nextpnr-himbaechel-qt Replaces: nextpnr-himbaechel, nextpnr-himbaechel-gowin, nextpnr-himbaechel-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin-qt_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 1515784 SHA512: db49fb51d2030498e6652a5c7bfece61938e8b2ac225d04ab2eedf857c56107468d338619616158a2e16886bcfcb5e2af406e083cb8efb1e8c366bee0abacd22 SHA256: bc88fe422eee7ecd98dc52737481aebe30aef35cb3141df72414147fd81f8100 SHA1: 2d861ad76a60d3b4d35c696f2e9468479392cf5c MD5sum: 7cd6e407efc849e990a83b668098be28 Description: FPGA place and route tool for Gowin GW1N - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-gowin supports the Gowin GW1N series of FPGAs. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-himbaechel-gowin package. Package: nextpnr-himbaechel-gowin-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 33346 Depends: nextpnr-himbaechel-gowin-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin-qt-dbgsym_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 30648832 SHA512: f70b7fb1199623ccc75a359a9a6d7ad8575b85dec250ee2a4a0c923e5ef007cb65b1f1761564f6caa29464c368ff4046da1b7d0869cd4fd1a54f84ee4771bb08 SHA256: 00b44069023caab070d7d32f0470b8db4ff91ded3880d22e9b37e15e591d86c7 SHA1: 6c647246f0516d8e1893c906143fccfe5e167ee4 MD5sum: d7c1c97b9a2ca01a070e857d29f691c2 Description: debug symbols for nextpnr-himbaechel-gowin-qt Build-Ids: a8cc623c23bf6229bb80bf468d40b3d113cb8a85 Package: nextpnr-himbaechel-xilinx Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 2221 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.4), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-himbaechel-xilinx-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel-xilinx-qt Replaces: nextpnr-himbaechel-xilinx-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 873200 SHA512: 6581c41cf22baacf3a063e4d78f7d4d13f65088cbda4b3f3b82ad5b1015bf2d29f99c46b638c1e0e5b43d2a1452f54a834ba4d490cb57223ad00f37fe6d4cd1f SHA256: 7972ea63a545f9d55b9db6b2d6771c011d92ff6e938926f57d48cdeeb0b70a1e SHA1: a56bc11e8155b3c29af346f5e1dc44b965eab6e7 MD5sum: dc61ec71fb3756dda07bcf55bdede0b3 Description: FPGA place and route tool for Xilinx Artix7/Spartan7/Zynq7 nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-xilinx supports the Xilinx Artix7/Spartan7/Zynq7 series of FPGAs. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-himbaechel-xilinx-qt package. Package: nextpnr-himbaechel-xilinx-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 212700 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx-chipdb_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 4729824 SHA512: a8c0ba14e8ea3c2ce1a11508e6c6f02d9620a1eeaff7eaefbc18a0867b49afb4f71be671a482d837327001ba3f2173e178c6080658ef754a6c9218012e612d85 SHA256: 87709ec14a158df75c8f1af8a81b86b2ca39059bb782462793833ea9b554114f SHA1: 78e4dbfba14808772f9e6445a5d4961b925befa8 MD5sum: d93e60f5b907d3b0d586bb4d03cc3a4a Description: FPGA place and route tool for Xilinx Artix7/Spartan7/Zynq7 -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-himbaechel-xilinx-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 23835 Depends: nextpnr-himbaechel-xilinx (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx-dbgsym_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 21742428 SHA512: d2f0ad5f353a21b55099c1654ded8b0eb96fd754af118a56fe424dfe4495f4a0de0eca7598496729c7509818c6dc8a5c9f2455fb411e49a0f936ebd5d7a131dd SHA256: bc471c128543ec39c6e6459b5f83d3b899bf5ed6b238736154d85f8c4cf11cb1 SHA1: 71752f50c118a891d40fb4359b58556689f19ec6 MD5sum: 5d22c5877aeae016a3f971e22ca53527 Description: debug symbols for nextpnr-himbaechel-xilinx Build-Ids: db90e9f0fc5056469c8a885480a2df4a2ee63093 Package: nextpnr-himbaechel-xilinx-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 4252 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.4), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-himbaechel-xilinx-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel-xilinx Replaces: nextpnr-himbaechel-xilinx Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx-qt_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 1530308 SHA512: fcc9633b681ff4948db45a2e5bd47d93ccc42ab9ecc50a2ba90ef4f36995e0ec7c0dc28d8c314c2990a115d3b3870bbb2f015ac8411769df87b9f34e0379ceea SHA256: 67ad8d78242c946a82acc684e47f0446229a7aaeac883689290d6118b6578135 SHA1: 4ee64f24bdfe49e64d9c8419656bf9b28d18e028 MD5sum: 41c27b821b8a2c894e91d7a486665281 Description: FPGA place and route tool for Xilinx Artix7/Spartan7/Zynq7 - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-xilinx supports the Xilinx Artix7/Spartan7/Zynq7 series of FPGAs. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-himbaechel-xilinx package. Package: nextpnr-himbaechel-xilinx-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 33990 Depends: nextpnr-himbaechel-xilinx-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx-qt-dbgsym_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 31225068 SHA512: b4763f0ec7dd8d315a6f027baeca499e6939eb01b6b767056d80054c301aa44b70d88741fcfe5def12b0febc7de0b1e99b55511ba80c7839f891131b08a38203 SHA256: 70080da8ad5bc70da0a7d40fa5f9752d478ed362f788e140b3e3a8a978a0d248 SHA1: 1f42b91e1453905194a156816f57c035881c6bf6 MD5sum: 209607facca7bdf1e50137c51af28931 Description: debug symbols for nextpnr-himbaechel-xilinx-qt Build-Ids: fcafb59a6ca4336d9e57acb46027cae40f87e80a Package: nextpnr-ice40 Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 1881 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.4), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-ice40-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys, fpga-icestorm Conflicts: nextpnr-ice40-qt Replaces: nextpnr-ice40-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ice40_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 754148 SHA512: 179a2364c0294681ffcf49c1b21a7e1272db8cfc7f3083d5abb535aedb737c1aeaac1de9300413a8cc9aacb92e03366ba45dbb0ee2f0d33e32faa4487d99702a SHA256: b6ce7ff754c03adf12a48d595b82c71cf95f152934da6b18c7a3f04d337dbc33 SHA1: 94b940f2b76900c3891c70fb8a1f77889061dc94 MD5sum: 4ec2212c2be162ce3dd2ef378853a9ef Description: FPGA place and route tool for Lattice iCE40 nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-ice40 supports the Lattice iCE40 series of FPGAs and uses the hardware description chipdb from the fpga-icestorm package. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-ice40-qt package. Package: nextpnr-ice40-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 224817 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ice40-chipdb_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 31532088 SHA512: 772cf92dd52dc78c30c8ae9e2266a40a4cdb9a79c6716843a62576d975776f8ca475aefec14748e2aa4f73614100c054e561d6c65dfba3b5c3e5a4fad1a22685 SHA256: cc811b662b64518e997944bfb0c45c209be2f109d2bd7a929f33849ca1a76edf SHA1: 4bf15053c0b450c4d6daf77fe39cd74ccab93387 MD5sum: 5c01f661c98b3ea8bc50de98d5971610 Description: FPGA place and route tool for Lattice iCE40 -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-ice40-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 20719 Depends: nextpnr-ice40 (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-ice40-dbgsym_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 18928236 SHA512: 792b0dbdd01b4782322654cf16682104d217d85c8cdde37f61bef0b756054dadcb66ac048658704b630df4a507addc0710178e2a5212ea5e670f3d0965c0f95d SHA256: a94bcff72007ff71659fdcd12b619c5d29d58689890b4eef037ed1e57cfc6f8e SHA1: 3f0fbef12ba8a57e9e268fd272d9d9c7d35ac467 MD5sum: 189860f1e1e4135c7e5f9ad3333e83ec Description: debug symbols for nextpnr-ice40 Build-Ids: c613d878d26b6f01434fcdc54b9c23a481361c63 Package: nextpnr-ice40-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 3847 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.4), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-ice40-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys, fpga-icestorm Conflicts: nextpnr-ice40 Replaces: nextpnr-ice40 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ice40-qt_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 1389220 SHA512: d66000b31bd7a8dfec247e47593f38e22c41e03d74ac63c7cd1296a89b49c29852dfd265b0efcc774e2d079e631a2ec74f21e51bf60228b953f23fff5e44ff5d SHA256: fd1e6675614ff9d8a9a94c435757c5f1eea22d7e0689f07d0158d5d2602c694c SHA1: e88e93a5d4a0a24f53a05385bfc3dcab7976fd21 MD5sum: 114e47ff018538a169544843157a355e Description: FPGA place and route tool for Lattice iCE40 - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-ice40 supports the Lattice iCE40 series of FPGAs and uses the hardware description chipdb from the fpga-icestorm package. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-ice40 package. Package: nextpnr-ice40-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 31055 Depends: nextpnr-ice40-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-ice40-qt-dbgsym_0.10-6~bpo12+1~sjr2_riscv64.deb Size: 28612220 SHA512: 26beb540e6ca485e2786139680b3afd45cfb0893c6948b8abe01a9c41b54f1d4fe513f0d2e63b7cd9fc2f8c4b51012ab1bec9b1b24c6615d5f3548702aa1befa SHA256: 9b76521f201bfd5f33cd13092e81b5745a8a36b41e27dc601523482752c4e833 SHA1: b1d20d860847c546846ce399f869fe4cd7db6dbc MD5sum: 2164567a7d2a5f5de000ab9041418f55 Description: debug symbols for nextpnr-ice40-qt Build-Ids: 36a8eebf8f23c157c59c959423d814bbff977d8f Package: prjxray Version: 0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 3317 Depends: libc6 (>= 2.34), libgcc-s1 (>= 3.4), libstdc++6 (>= 11) Homepage: https://github.com/f4pga/prjxray Priority: optional Section: electronics Filename: pool/main/p/prjxray/prjxray_0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr_riscv64.deb Size: 634664 SHA512: ac9279d7469f0f846d90a4b4147bd9499a70e8f4633418e82ef5b9df5140f8ab9533b18e67184c052e493f30ee9b15e2174d0093e1c6093b045128b296c77d25 SHA256: 16ecb18e8102b3fdbaefafa8ba3d995398309af835fb4dde1845e9196f28ef5e SHA1: b3261f2abb8311c57403c7b9cd945feb17691960 MD5sum: 20b87ff176355f8e923fe4809f7b049b Description: FPGA bitstream tools for Xilinx Artix7/Kintex7/Spartan7/Zynq7 This is a collection of tools to dissect and analyze Xilinx 7-series FPGA bitstreams. . You may find these useful if you are developing for one of these FPGAs, otherwise you don't need this package. Package: prjxray-database Source: prjxray Version: 0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr Architecture: all Maintainer: Debian Electronics Team Installed-Size: 415597 Homepage: https://github.com/f4pga/prjxray Priority: optional Section: electronics Filename: pool/main/p/prjxray/prjxray-database_0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr_all.deb Size: 6758560 SHA512: 4c2ca504e3b7a4c2912c36fc0d919931cabef369b172fbc6f3386458ab5df7b29d8a55c00ee208b06464da6ea0fd58fe110b21e1acf6b0a032d806830004f819 SHA256: 7f00b855fb8ddf1a8af7ce4be7162eee87f463c184167716d88fa32b0ca3cf77 SHA1: cb5ff0c936c9e74e1d36a2df6a8fcb0a5bca3ba1 MD5sum: 46803774f40610fdec6a86bf2641f0f8 Description: FPGA tile database for Xilinx Artix7/Kintex7/Spartan7/Zynq7 This is a database of the various block elements found in these FPGAs. . You will typically not use this package directly. Unless you are writing an FPGA toolchain, you probably want to use the nextpnr-himbaechel-xilinx package instead. Package: prjxray-dbgsym Source: prjxray Version: 0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 20477 Depends: prjxray (= 0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr) Priority: optional Section: debug Filename: pool/main/p/prjxray/prjxray-dbgsym_0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr_riscv64.deb Size: 19970304 SHA512: 2b3d21d86529cf1271652f70d4d833d5ea40fa4054d5142d4beaba8e94722d3a04ecbfdc3b3a988a007569323be1224db30747998430ffaaa2ff30aa30db173d SHA256: 022f3123bc82e3b9e143a12523a5c0db2968e83e1c7122bc8f9d565d1ad48e5f SHA1: d203cd0082ba1ca5ebd5721611430f0fdeb421a2 MD5sum: 8bd3d76b0a136a74550bd6bc3c6549ec Description: debug symbols for prjxray Build-Ids: 1ad40fb13ab8762c082da4a0dabb9a5aa15da326 1d04de2bc3e480ffcfc5fe00344dff20d65d4387 2a28a815b0fe3d4036f8ab2262204b76ef915fa5 58f8b580f73266833f0a19e5cae4d0597e127d80 722c5498e9e7ecbe58d6659e6fb8f4cc632b5777 d2485cc056da85e7ca0749cf341a40030501cd7a db0eb40a5210f38221668d5eb87e7ba5b7b287c3 Package: python3-apycula Source: apycula Version: 0.32+dfsg1-1~bpo12+1~sjr Architecture: all Maintainer: Debian Electronics Team Installed-Size: 4183 Depends: python3-msgspec | python3-msgpack, python3-msgspec | python3-cattr, python3-numpy, python3:any Provides: fpga-apicula Homepage: https://github.com/YosysHQ/apicula Priority: optional Section: electronics Filename: pool/main/a/apycula/python3-apycula_0.32+dfsg1-1~bpo12+1~sjr_all.deb Size: 3530016 SHA256: 4d486916ef698cd38a3ad0091dbe47865e3ab4c40d864d695cd6735f9c363395 SHA1: abfde4c1e76708bf65b11179a0ecfc8cb6ee37bc MD5sum: 8566bb0c88295f363e54c02fbbe254b6 Description: Tools to generate Gowin FPGA bitstreams Project Apicula provides documentation and tools for the bitstream format used by Gowin GW1N series of FPGAs. . This package contains the bitstream tools, apycula python library and chipdb files. Package: python3-peppercorn Source: prjpeppercorn Version: 1.12-1~bpo12+1~sjr Architecture: all Maintainer: Debian Electronics Team Installed-Size: 323 Depends: python3, fpga-peppercorn-delay Homepage: https://github.com/YosysHQ/prjpeppercorn Priority: optional Section: electronics Filename: pool/main/p/prjpeppercorn/python3-peppercorn_1.12-1~bpo12+1~sjr_all.deb Size: 26336 SHA256: f945d8f41dbbe81ed52ef919954b0fc23a84e1bd8509b3ad731bfa6ea2468ce1 SHA1: 843b171854afc4322f1d875ae259755a12fe9a97 MD5sum: 0c1861447639219be9d4f847ec25cedf Description: Library for interacting with Cologne Chip GateMate FPGA bitstreams Project Peppercorn provides documentation and tools for the bitstream used by Cologne Chip "GateMate" FPGAs. . This package contains the Python library. Package: python3-pytrellis Source: prjtrellis Version: 1.4-2~bpo12+1 Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 3307 Depends: libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.4), libpython3.11 (>= 3.11.0), libstdc++6 (>= 11), python3, fpga-trellis-database Homepage: https://github.com/YosysHQ/prjtrellis Priority: optional Section: electronics Filename: pool/main/p/prjtrellis/python3-pytrellis_1.4-2~bpo12+1_riscv64.deb Size: 866188 SHA256: 6cec3093c0ec728ec61a4c5ef0a0bf52ba8aaa3d3868e77ef9912426d5269150 SHA1: 7d7b7c06f18aa4b707d7239aea5114bcf12a18d1 MD5sum: cdd6062cab3ec8ce5321ead1596765eb Description: Library for interacting with Lattice ECP5 FPGA bitstreams Project Trellis provides documentation and tools for the bitstream used by Lattice ECP5 series FPGAs. . This package contains the Python library. Package: python3-pytrellis-dbgsym Source: prjtrellis Version: 1.4-2~bpo12+1 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Electronics Team Installed-Size: 20060 Depends: python3-pytrellis (= 1.4-2~bpo12+1) Priority: optional Section: debug Filename: pool/main/p/prjtrellis/python3-pytrellis-dbgsym_1.4-2~bpo12+1_riscv64.deb Size: 18177168 SHA256: 23abf1bc2191b19b4f51447459e2a629a231502cdea42b55b93446c429c47e03 SHA1: 1e386cb24f04e677e6b8ed9e0ca14dd9efddd447 MD5sum: 65f84edd67b0c8c044696148461c9210 Description: debug symbols for python3-pytrellis Build-Ids: 9ffd24139be0f903ceda77b895ecf77b9ef31d2f Package: yosys Version: 0.33-5~bpo12+1 Architecture: riscv64 Maintainer: Debian Science Maintainers Installed-Size: 11805 Depends: libc6 (>= 2.34), libffi8 (>= 3.4), libgcc-s1 (>= 3.3.1), libreadline8 (>= 6.0), libstdc++6 (>= 11), libtcl8.6 (>= 8.6.0), zlib1g (>= 1:1.2.0), python3:any, python3-click, yosys-abc (>= 0.32-1) Recommends: xdot Homepage: https://github.com/YosysHQ/yosys Priority: optional Section: electronics Filename: pool/main/y/yosys/yosys_0.33-5~bpo12+1_riscv64.deb Size: 2928144 SHA256: 638153fb3d77f82026b68cf121121ae70ea263ae17eb570bca5a648bb4a53576 SHA1: 37f549bae35bbaa5dbaf11d26a215e3ce7b3645a MD5sum: d4ee68527a1e9de94c197d450046dfed Description: Framework for Verilog RTL synthesis This is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains. . Yosys can be adapted to perform any synthesis job by combining the existing passes (algorithms) using synthesis scripts and adding additional passes as needed by extending the yosys C++ code base. Package: yosys-abc Source: yosys Version: 0.33-5~bpo12+1 Architecture: riscv64 Maintainer: Debian Science Maintainers Installed-Size: 12647 Depends: libbz2-1.0, libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libreadline8 (>= 6.0), libstdc++6 (>= 11), zlib1g (>= 1:1.1.4) Breaks: yosys (<< 0.32-1) Replaces: yosys (<< 0.32-1) Homepage: https://github.com/YosysHQ/yosys Priority: optional Section: electronics Filename: pool/main/y/yosys/yosys-abc_0.33-5~bpo12+1_riscv64.deb Size: 5319420 SHA256: 082e23ae754db3ce8626acbbe00d5fbcdbfc0b37e4eab06d0a771b3d7b1a4298 SHA1: b956abebed8a2aed32b1aa5e9a3a7d8cbfb06431 MD5sum: 244a95a49bd4711101a9137f88807b1e Description: Sequential Logic Synthesis and Verification Algorithms ABC is a system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. It combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification. . This is a fork of berkeley-abc maintained by the YosysHQ team for use in the yosys RTL synthesis framework. Package: yosys-abc-dbgsym Source: yosys Version: 0.33-5~bpo12+1 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Science Maintainers Installed-Size: 172560 Depends: yosys-abc (= 0.33-5~bpo12+1) Priority: optional Section: debug Filename: pool/main/y/yosys/yosys-abc-dbgsym_0.33-5~bpo12+1_riscv64.deb Size: 20354824 SHA256: 4999ec29b4a9fde4502691d16b4640397bd774024cafc837ac1b8b23a330a26a SHA1: 725c088c48ab9571fcff4cd3668cb32543589190 MD5sum: f4b8b0651dc566280a80f4bd0053ec68 Description: debug symbols for yosys-abc Build-Ids: 6c03ecf69de1170ea552bef860b51210d3ac95c3 Package: yosys-dbgsym Source: yosys Version: 0.33-5~bpo12+1 Auto-Built-Package: debug-symbols Architecture: riscv64 Maintainer: Debian Science Maintainers Installed-Size: 255068 Depends: yosys (= 0.33-5~bpo12+1) Priority: optional Section: debug Filename: pool/main/y/yosys/yosys-dbgsym_0.33-5~bpo12+1_riscv64.deb Size: 46967712 SHA256: d337e5c13f716d6bf1e2e3888d826689c685128aab43185a9a2a3392c351e66b SHA1: b6b6c78fb3085cfd8fae21a1e0d8bd6dbb78c588 MD5sum: 2f97354bc4259c945586c4d0f3730605 Description: debug symbols for yosys Build-Ids: 5e4e53f71417d4ea002767abd38acf91fb6e31f7 baf7b808f205f197193b8f28f2adecf605d432e9 Package: yosys-dev Source: yosys Version: 0.33-5~bpo12+1 Architecture: riscv64 Maintainer: Debian Science Maintainers Installed-Size: 506 Depends: tcl-dev, libffi-dev, libreadline-dev Homepage: https://github.com/YosysHQ/yosys Priority: optional Section: electronics Filename: pool/main/y/yosys/yosys-dev_0.33-5~bpo12+1_riscv64.deb Size: 102112 SHA256: f767a015c0d280880cac1798bb44a00ba26aaa834b803f9ba64b4c9bf7ddaff0 SHA1: b094cab815a7cae3ec9badae9126093ffd33f965 MD5sum: 8f2751e7696f1e89a10c2018938b9f55 Description: Framework for Verilog RTL synthesis (development files) Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains. . Yosys can be adapted to perform any synthesis job by combining the existing passes (algorithms) using synthesis scripts and adding additional passes as needed by extending the yosys C++ code base. . This package contains the headers and programs needed to build yosys plugins. Package: yosys-doc Source: yosys Version: 0.33-5~bpo12+1 Architecture: all Maintainer: Debian Science Maintainers Installed-Size: 2179 Suggests: yosys Multi-Arch: foreign Homepage: https://github.com/YosysHQ/yosys Priority: optional Section: doc Filename: pool/main/y/yosys/yosys-doc_0.33-5~bpo12+1_all.deb Size: 2043192 SHA256: 34143f2c89dca9e6bdae51d9a4d78e2cf1c020c6efaefecf216c3413b581cea3 SHA1: 5918f53c66cc28806b5cdcf7fca3f0a35922925a MD5sum: 40e8528fd1b6a544e12702feea756483 Description: Framework for Verilog RTL synthesis (documentation) Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains. . Yosys can be adapted to perform any synthesis job by combining the existing passes (algorithms) using synthesis scripts and adding additional passes as needed by extending the yosys C++ code base. . This package contains the manual.