Package: fpga-peppercorn Source: prjpeppercorn Version: 1.12-1~bpo12+1~sjr Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 598 Depends: libboost-program-options1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.0), libstdc++6 (>= 11) Homepage: https://github.com/YosysHQ/prjpeppercorn Priority: optional Section: electronics Filename: pool/main/p/prjpeppercorn/fpga-peppercorn_1.12-1~bpo12+1~sjr_amd64.deb Size: 119160 SHA256: cb6af4232fd4b75cdacd865ea39c31dd9886b52be0f83e1763f7cd692297533a SHA1: 9d66b5d40b70de09f3cd3239421547ea7856f5c7 MD5sum: 166ffc77ecf0258a19804ace0a85ae87 Description: Tools for interacting with Cologne Chip GateMate FPGA bitstreams Project Peppercorn provides documentation and tools for the bitstream used by Cologne Chip "GateMate" FPGAs. . This package contains tools for producing and analyzing bitstreams. Package: fpga-peppercorn-dbgsym Source: prjpeppercorn Version: 1.12-1~bpo12+1~sjr Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 3318 Depends: fpga-peppercorn (= 1.12-1~bpo12+1~sjr) Priority: optional Section: debug Filename: pool/main/p/prjpeppercorn/fpga-peppercorn-dbgsym_1.12-1~bpo12+1~sjr_amd64.deb Size: 3164348 SHA256: 39c3ce839385e33299b39ded31f4a87c9d713e2013156a01c136304a7746523d SHA1: 68a4d8c056ff3a001d839b61f0a5c82a9a0fd9ce MD5sum: a7769e05ce8e3c860e77b81a7a3d6cd6 Description: debug symbols for fpga-peppercorn Build-Ids: 5ed9b0b1d617c6d3a4cc639f8aad1cd4439c621b 687a45985601e595632027933d42ad9a1927f52e Package: fpga-peppercorn-delay Source: prjpeppercorn Version: 1.12-1~bpo12+1~sjr Architecture: all Maintainer: Debian Electronics Team Installed-Size: 4902 Homepage: https://github.com/YosysHQ/prjpeppercorn Priority: optional Section: electronics Filename: pool/main/p/prjpeppercorn/fpga-peppercorn-delay_1.12-1~bpo12+1~sjr_all.deb Size: 4165584 SHA256: 68bfc447d16c27af0b5c8a42c28c3c20754e540afa3aace6b3bf1d73cd6f8595 SHA1: 5b038d3e46fd48bdb696fc89feac534b4577e6ea MD5sum: 063fbbcd050c7609831b43bfae104380 Description: Propagation Delay Database for Cologne Chip GateMate FPGA bitstreams Project Peppercorn provides documentation and tools for the bitstream used by Cologne Chip "GateMate" FPGAs. . This package contains the expected best/typical/worst timings, as published by the manufacturer. Package: fpga-trellis Source: prjtrellis Version: 1.4-2~bpo12+1 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 1725 Depends: libboost-filesystem1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.0), libstdc++6 (>= 11), fpga-trellis-database Homepage: https://github.com/YosysHQ/prjtrellis Priority: optional Section: electronics Filename: pool/main/p/prjtrellis/fpga-trellis_1.4-2~bpo12+1_amd64.deb Size: 434936 SHA256: 8974774de0ad2374e7e87ae84c0b8c649023c5afe640a2f32808693c3b69f443 SHA1: db7f676aa8637887f5c56090adb4f571e1ce0c25 MD5sum: e08eb69cc977f3c7adc08e88ded28f0b Description: Tools for interacting with Lattice ECP5 FPGA bitstreams Project Trellis provides documentation and tools for the bitstream used by Lattice ECP5 series FPGAs. . This package contains tools for producing and analyzing bitstreams. Package: fpga-trellis-database Source: prjtrellis Version: 1.4-2~bpo12+1 Architecture: all Maintainer: Debian Electronics Team Installed-Size: 75917 Homepage: https://github.com/YosysHQ/prjtrellis Priority: optional Section: electronics Filename: pool/main/p/prjtrellis/fpga-trellis-database_1.4-2~bpo12+1_all.deb Size: 951208 SHA256: 536ed777bc908f366edcb17587e0a090c9638c797da69047c69af873abc57858 SHA1: 6a6159937008dc3b9ed373d963e6c14581c95d8e MD5sum: fa1a380858380d5ccb75555517592e72 Description: Lattice ECP5 FPGA bitstream database Project Trellis provides documentation and tools for the bitstream used by Lattice ECP5 series FPGAs. . This package contains the machine readable bitstream descriptions. Package: fpga-trellis-dbgsym Source: prjtrellis Version: 1.4-2~bpo12+1 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 9440 Depends: fpga-trellis (= 1.4-2~bpo12+1) Priority: optional Section: debug Filename: pool/main/p/prjtrellis/fpga-trellis-dbgsym_1.4-2~bpo12+1_amd64.deb Size: 9215888 SHA256: 3c459f169a1bc15350862f88eacfa17ce2d33a797cfe83eae3534c521f7ebd57 SHA1: b15f53a95e36666770512d6f99708355ea8f004a MD5sum: 014241be4fe8da2c92c96b866a628626 Description: debug symbols for fpga-trellis Build-Ids: 5ec3229ce0269561a19b9fd7e114f2b3579e4e1e 6150e338a6320cf4dcd6d77e291c6281426e087e 70befd14075f7ee17ed8fa1f8444cc746e000a73 8b17615dbb9e5da3245b18d0130e5aab95c20332 9c94e92bf4cd23a601f9f50434ceae8b9a47a259 c46599d1d66cad183e318246ed1883e5c674eeb5 Package: iverilog Version: 12.0-2~bpo12+1 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 6936 Depends: libbz2-1.0, libc6 (>= 2.35), libgcc-s1 (>= 3.0), libreadline8 (>= 6.0), libstdc++6 (>= 11), zlib1g (>= 1:1.2.0) Suggests: gtkwave Breaks: verilog (<< 10.2-1.1~) Replaces: verilog (<< 10.2-1.1~) Provides: verilog Homepage: http://iverilog.icarus.com Priority: optional Section: electronics Filename: pool/main/i/iverilog/iverilog_12.0-2~bpo12+1_amd64.deb Size: 2035476 SHA256: 1e71361f4d1e4a8f2b25580dce3d1263d86b49072ce8a363926b81ba2c9bcadc SHA1: 6929f70102072a6a8daa8dbd4f4cbd7fe60b2535 MD5sum: fdcd5080db7fa7755db83c016e35478c Description: Icarus verilog compiler Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs. . The compiler can target either simulation, or netlist (EDIF). Package: iverilog-dbgsym Source: iverilog Version: 12.0-2~bpo12+1 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 19683 Depends: iverilog (= 12.0-2~bpo12+1) Priority: optional Section: debug Filename: pool/main/i/iverilog/iverilog-dbgsym_12.0-2~bpo12+1_amd64.deb Size: 19022344 SHA256: caa95c1e133e7a2f72c74dacf80b91135e7b8228c0cc02f0970cf973a44a3ba9 SHA1: 42c08697ecc5fd48d30a9ffc17f4c7fd893e74f4 MD5sum: f534e24fcd301d02eebe7fbfd7fea990 Description: debug symbols for iverilog Build-Ids: 0c4a6783a415e269109edb54d61f7efcab8e5558 1216a04343971fdabe524de7ed39835e06f7531c 23ec1cb1fbcc4ec4f7d5b2ef386a1b54e5c995dc 29c2a0f652f179fef91c9dc3d63cde4876a18e34 2f1f292a6bce07bd08253fd1bf3fba53ac483e19 356a55378f6db2478c583a1aeb900686e9002eaf 4ed9d83b050fece70e18e349321e3b98d1818c39 70cde888b2c4584dc2a28ea0c0e78a68e4620a1d 7858328effcaf82e26318e3ead5f3f94b43c595b 848286720f871da578946fb37ae0f0c45851cd0c 8547795953b48bd6e8ecb51da5c348b0aadf7157 8d888fcd6d7c7531e7dc65fb335905d50c87d557 9a8586085b110c9789725003b2a2455885f269a2 aa16329222b8fa879ce1fd5e0b05b19fc51b7722 b39feadd9f4e79d4ca64f165526f34358a024f06 bdb184aa2780d20e92b7f88158eba11f50d0f421 beb79a7796a89898b2e46d0ed92bbf66fde1c8a8 db8211106f475018e7b89d70da420b34b2a5fdcd deb3bdf9a8c94086efe76a4e0243778f494d51dc ee5c27c61f43b45d31afbe39b3c6cfa5095abbe6 f26aabb468a97679a3c4eddc2d9afd6b7e14a4be Package: nextpnr-ecp5 Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 3161 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-ecp5-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-ecp5-qt Replaces: nextpnr-ecp5-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ecp5_0.10-6~bpo12+1~sjr2_amd64.deb Size: 1005636 SHA512: 6bd3dd865ff77196d212597ea00538431cfcd5aeae9e19178bd267e31cc8f3c944d8412ba31bb0b2b018ab4f9c53336d0ee6585180013f569280654e49ef8804 SHA256: 7170aff3653733a90e1e38554eba8b0f6fb1aaba4e8bd158721dda3ddd61d08e SHA1: 92e8133f5fbaca6ce7d36ae94c8415f2eda44d45 MD5sum: 1f1fd8dcdb69ead7c892c21dacda87d8 Description: FPGA place and route tool for Lattice ECP5 nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-ecp5 supports the Lattice ECP5 series of FPGAs. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-ecp5-qt package. Package: nextpnr-ecp5-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 102547 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ecp5-chipdb_0.10-6~bpo12+1~sjr2_amd64.deb Size: 2908620 SHA512: 5e4ae634793649247c3e8a2ad7169ddf99963103b2d1be521da5fb961be2a0dc44c2ece321a891db5bb5cec6217ee9dd45db643cbd076782cf374f33e900204a SHA256: ceeb424c176727f1b0d1bb06976ba0de64d41ffe30e6c0c7f73d102fffaa1b44 SHA1: 7f7ce42872e479e9a1c06ea4016ffe677d4c29f2 MD5sum: 6c0e7d91a89f453f2ed1d79867d1635d Description: FPGA place and route tool for Lattice ECP5 -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-ecp5-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 25126 Depends: nextpnr-ecp5 (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-ecp5-dbgsym_0.10-6~bpo12+1~sjr2_amd64.deb Size: 24475892 SHA512: 9c8815d4ed2834a95335c530982b2b895df3ee4e4ffc4956d5ae7ba2dca77634a6dad9470601fa8a8b53a9bbfa92ae3e0e4d1a2a38a85654187441046989a4a4 SHA256: 153d425aebd2c66beafe2f8e66d1d84de641490b7adfdbac6074b73f9688cfed SHA1: 11b9eb796c9614e364eb367194fbe6051dd71414 MD5sum: baa179a5636b880e23d75538e46c60ed Description: debug symbols for nextpnr-ecp5 Build-Ids: 427463a005456a2ad68f2ccc9882d871630600aa Package: nextpnr-ecp5-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 5439 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-ecp5-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-ecp5 Replaces: nextpnr-ecp5 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ecp5-qt_0.10-6~bpo12+1~sjr2_amd64.deb Size: 1673836 SHA512: e958f3056f33219b69d2b953bdba37e64a611ba0cffd807a017923e2a61d4c4839184cbb389108edc1d7e840fa28fac8386d781aa1da47ee075704bfc1867399 SHA256: 967b88814d1c80d34aeaa442935977ffc8441f5e76cc857549e8e1ec33364e8a SHA1: 4171dd83b5a30242b1e4d992759606a14b3567ad MD5sum: fe3b568d493b490d96fefe827d632d25 Description: FPGA place and route tool for Lattice ECP5 - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-ecp5 supports the Lattice ECP5 series of FPGAs. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-ecp5 package. Package: nextpnr-ecp5-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 36026 Depends: nextpnr-ecp5-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-ecp5-qt-dbgsym_0.10-6~bpo12+1~sjr2_amd64.deb Size: 35183596 SHA512: 64b5a6933a4f1836f325b7edade511362168e012ebcad960307a1e197e396db530b045f7828fd2cffd602cdc994dd790d58d9cb9e832acb6ab89b8ede3be35fa SHA256: acc07fab2aae9fd1507a66a8884d865bc725e4d0ede774f4f52e31a365acfb0b SHA1: 38b4455b6061fc33dcfbc54d373f9c47f4e2be6e MD5sum: 20b7e4c212d32be577e1e9eaf81a787d Description: debug symbols for nextpnr-ecp5-qt Build-Ids: d52e1aa19529408f8b41da3cf35d549327dc3e2d Package: nextpnr-generic Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 2276 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libstdc++6 (>= 11) Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-generic_0.10-6~bpo12+1~sjr2_amd64.deb Size: 740028 SHA512: 2b18f86fbf56b152ae5ce642dbfb23db9b9dfe5bd77db9f092bd2c350123264eb8ba7541864c1b6ea00ff6fa12601be6e36e0ae045c3e95bfab0846b8ea9894b SHA256: ea7ffcd1ecdb30dde89ffafdf26d8dfa332165fd3333ccfd931f5961974ac8ac SHA1: 8fa6ee050508592d7fd17479d791054f07c52d28 MD5sum: dc664e0984b4c7f0bdb3617f896dad77 Description: FPGA place and route tool for Generic FPGAs nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-generic supports nextpnr's synthetic "generic" FPGA. Package: nextpnr-generic-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 22031 Depends: nextpnr-generic (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-generic-dbgsym_0.10-6~bpo12+1~sjr2_amd64.deb Size: 21476604 SHA512: 203dda4b901e8de8cb6310ddec04f0aa16811a98b3dae21645550082c954b3481fff0abcb8c446cd8ee2d39edf141d28b37cd4cdf457e39f972d01a3339ba968 SHA256: 6a0a11752e3e5f586fa6aea669f26e24472c5df913a6283c0dfd9a1ecccc151b SHA1: 71201e0e90360118301e6470dd3d8035412a4a66 MD5sum: cd894a31df2f98d7598a7fb1840f86ce Description: debug symbols for nextpnr-generic Build-Ids: ee61a7e8332e3d82acd7f042545994158cd056bf Package: nextpnr-gowin Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: all Maintainer: Debian Electronics Team Installed-Size: 25 Depends: nextpnr-himbaechel-gowin Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: oldlibs Filename: pool/main/n/nextpnr/nextpnr-gowin_0.10-6~bpo12+1~sjr2_all.deb Size: 8328 SHA512: b77b998499c3e83bdd8a23a8bb0fbda22fee6f7e91c2093e9e4aab3fa48609d8422d08b4b781a2291621fbbad1b0fd8057388bb6645d1cfbd5a97a68adbfdfb8 SHA256: 6237e6a382c139d63a2ec3dbf7f3d68edbf37da8b60a20336da54fd8a6130eea SHA1: 749345b1d5b3c17dedf02ea92ce385aa102f6428 MD5sum: 274ea915800886f8c51273b5104c301a Description: transitional dummy package -- replaced by nextpnr-himbaechel This is a transitional package. It can safely be removed. Package: nextpnr-gowin-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: all Maintainer: Debian Electronics Team Installed-Size: 24 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: oldlibs Filename: pool/main/n/nextpnr/nextpnr-gowin-chipdb_0.10-6~bpo12+1~sjr2_all.deb Size: 7976 SHA512: fc0e9b93702e3b7b4de6016b45b320dc339f22f24ad602f2f5a0bf6bb15a7721b5c6879a58f00d0947aa6f3d628b8bb84b48b647bc187dba8e6a163c924c075d SHA256: 398f8d816611f5b27cc3fba6737d2b1fdedc700c2a75c781a33a4e9948ef5b23 SHA1: 77148239043b525dd781539429bee69873a1ed6f MD5sum: 1a1dc6681b3fa77e8440d1521ad993bd Description: transitional dummy package -- replaced by nextpnr-himbaechel This is a transitional package. It can safely be removed. Package: nextpnr-gowin-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: all Maintainer: Debian Electronics Team Installed-Size: 24 Depends: nextpnr-himbaechel-gowin-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: oldlibs Filename: pool/main/n/nextpnr/nextpnr-gowin-qt_0.10-6~bpo12+1~sjr2_all.deb Size: 7984 SHA512: c37debbfb70f3973e933694b82a80309d71d23178d2ae67b13db6275b0ad29fca2453c32b7b57f738883b519ac0099830e9dae067281a29587e11c878f42e63b SHA256: 4cd94662b25f2dd22b2fba36836fdd290a61e23fc3398e99afeb66122c7df69d SHA1: d6c60bf5eacbe9c657a11f2e0255a79daa37d617 MD5sum: dff1e7e2c12db96810759080be4c1e60 Description: transitional dummy package -- replaced by nextpnr-himbaechel This is a transitional package. It can safely be removed. Package: nextpnr-himbaechel-gatemate Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 2721 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-himbaechel-gatemate-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel-gatemate-qt Replaces: nextpnr-himbaechel-gatemate-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate_0.10-6~bpo12+1~sjr2_amd64.deb Size: 893580 SHA512: 823c255beee1ab48c16cf83d263e72e9315c0baf33e4cf1bccd252f4c247d4c883e9dd2acf8e9a95b4a4040ffab7d87d796f7c45911080e74868ca6442c49cb7 SHA256: 26612a37f7dbe442ef1f85e35b06820f33e54e505edc7c48ea59b3572ccbceb6 SHA1: f9f6d26e37c0510ec8c3cedc5f4a0812ece029c0 MD5sum: 3a1aaea38b37537536d1711c1e71f13a Description: FPGA place and route tool for Cologne Chip GateMate nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-gatemate supports the Cologne Chip GateMate series of FPGAs. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-himbaechel-gatemate-qt package. Package: nextpnr-himbaechel-gatemate-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 29728 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate-chipdb_0.10-6~bpo12+1~sjr2_amd64.deb Size: 617376 SHA512: c9bd0c61f6975c5f4610b582576b35a13afbf83fb684dbd121afb04d413e0ff7467961103656220e0d7087c0abcd59c7ddca1012f87fde4eb3f98270afa3fc19 SHA256: dcb972585dbec46252aab15baa4d9dee169f1e056d4507f8728492e2435512cd SHA1: fcbeb983b99782c47ede4cec7712192a70e5c03f MD5sum: b3f5bd3ee72e690824c93f4f2631c102 Description: FPGA place and route tool for Cologne Chip GateMate -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-himbaechel-gatemate-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 25295 Depends: nextpnr-himbaechel-gatemate (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate-dbgsym_0.10-6~bpo12+1~sjr2_amd64.deb Size: 24706680 SHA512: 7b42af9fe806f20e96683935f9c7a6809384e385e9eaebdc08335926058898e7bf5365742b8cdfd893c1f5b4c12723121cf6ee2a687c84301eba2b198705c4f8 SHA256: 1612ec16fa1a1a63c045c3842f9b231773a412b85447d3b90944face795dbb92 SHA1: 530466b19449b50738badd742359c2c1881d0ece MD5sum: cec9cc0fbdd646764db36303ae6352fe Description: debug symbols for nextpnr-himbaechel-gatemate Build-Ids: 3c70b323713811827025732412701ca465189965 Package: nextpnr-himbaechel-gatemate-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 4995 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-himbaechel-gatemate-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel-gatemate Replaces: nextpnr-himbaechel-gatemate Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate-qt_0.10-6~bpo12+1~sjr2_amd64.deb Size: 1562236 SHA512: 64cbd24a0282442e87446753c7032097457f5e502964b533afe67add535101e18a465eedc1f549397b3cb11559a1df631f79d430ae6c224ee7a353f37dcc123d SHA256: d0e8348613acca8618f39867b4e59d21833f0102925d1629c4d1b05ace7f8047 SHA1: 6f7e74a86168e3ac2d7c1fa7496aa61cafb3bd39 MD5sum: 1d05dfe8c0a180cd62a678c7c3dac831 Description: FPGA place and route tool for Cologne Chip GateMate - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-gatemate supports the Cologne Chip GateMate series of FPGAs. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-himbaechel-gatemate package. Package: nextpnr-himbaechel-gatemate-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 35738 Depends: nextpnr-himbaechel-gatemate-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate-qt-dbgsym_0.10-6~bpo12+1~sjr2_amd64.deb Size: 34944732 SHA512: 34270b6714e4c9bf89bcc3f2e5a6808039a7299ec8fa06936dc42f53bc3b274b0b6da430d77f923875c0fdce00d0d4f1804f4a852f14a0e7a8db2c8cc34cf224 SHA256: b736393e8f6989e125e95a7218edeeb808100ee07f5974d7255dc3636febeb77 SHA1: cb06701798ca5037e03e40d75655ffc6529f2fee MD5sum: a5bde4abf6fba6abb5010e3792c9d521 Description: debug symbols for nextpnr-himbaechel-gatemate-qt Build-Ids: 63e27a39bb82e1247646bff6eb7689c4d417f669 Package: nextpnr-himbaechel-gowin Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 2593 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-himbaechel-gowin-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel, nextpnr-himbaechel-gowin-qt, nextpnr-himbaechel-qt Replaces: nextpnr-himbaechel, nextpnr-himbaechel-gowin-qt, nextpnr-himbaechel-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin_0.10-6~bpo12+1~sjr2_amd64.deb Size: 863844 SHA512: b96ff52e20aafe64a1f9661e35b768cfb9a45a1cd37769f79d503c7bfec10c19b67c0b39f60be2a85f980145e479e5aa93e7b727a80508ec397735e855bc040e SHA256: 9c5057ad14d682c2f758fac55b30faa1b19a09e944ead6f7de89a08a4d862db8 SHA1: ceb5479cd49de234d904dc426f04b9cd6324c069 MD5sum: 08fef4f6863bc5e5f56eabc86283aa8f Description: FPGA place and route tool for Gowin GW1N nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-gowin supports the Gowin GW1N series of FPGAs. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-himbaechel-gowin-qt package. Package: nextpnr-himbaechel-gowin-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 172680 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin-chipdb_0.10-6~bpo12+1~sjr2_amd64.deb Size: 3587380 SHA512: 5ebe144e0fa4a0627e5eb56b47ae80062676042489665812574ba9f4a6f8917670197a483c0dc59eae9eb5ed437dfb9f09ba2f0cc068909be639782f3c84b918 SHA256: a7ed532e71266205c5103d3dcc697c18b1f6df132db4adb0e60db98c2b2ed7fb SHA1: 06d40f65fb70e30effca006ec9dd22a9d474e212 MD5sum: cd8e9c24df0b29e85a4b3ad394863d36 Description: FPGA place and route tool for Gowin GW1N -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-himbaechel-gowin-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 23710 Depends: nextpnr-himbaechel-gowin (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin-dbgsym_0.10-6~bpo12+1~sjr2_amd64.deb Size: 23118436 SHA512: 9fdfdc1e5ed0f7bce023175c13d7db655dd34468039157f8a6a1d2dd6200673bcd58f9664e9402de1d96db27212a0e79ed6e6a339d8c21a907d339f85a1bc726 SHA256: b3ec3ab9190f3101d9f32d261ad06f9061d7a762d96265295df95a8564b8ca33 SHA1: c452fe0d130c38ed6df00b4173349354f6fe709c MD5sum: 6ab5146e9d037c3075798e38227136e0 Description: debug symbols for nextpnr-himbaechel-gowin Build-Ids: 7ae965fb2fc7ee813d72419564ef03bf068af575 Package: nextpnr-himbaechel-gowin-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 4871 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-himbaechel-gowin-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel, nextpnr-himbaechel-gowin, nextpnr-himbaechel-qt Replaces: nextpnr-himbaechel, nextpnr-himbaechel-gowin, nextpnr-himbaechel-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin-qt_0.10-6~bpo12+1~sjr2_amd64.deb Size: 1533196 SHA512: c9ca5a67be69f5e7e7596ecd93ac99a4c15a09bf8fb6b0d0adb84f3ee553809cd2299f338a5dccd0fb657f714ae38f708314ed112615fedebe3419175aebe27a SHA256: 07c244c68d740ebcaa40e2c7caa240710b8506789732a82969ef27d90021de56 SHA1: b853a82c8674f301a13698d14ea732cf2f68852f MD5sum: eb54dccffec0ed23f83236f2239a353a Description: FPGA place and route tool for Gowin GW1N - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-gowin supports the Gowin GW1N series of FPGAs. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-himbaechel-gowin package. Package: nextpnr-himbaechel-gowin-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 34125 Depends: nextpnr-himbaechel-gowin-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin-qt-dbgsym_0.10-6~bpo12+1~sjr2_amd64.deb Size: 33342188 SHA512: f64ed94138fb720e982e3cc9d46ea386482d05c5e227f561c09405c55d71f419ce68c42a33cd93f9deca3a7b68a7b82f0b1275db241270bc21e45c38a44c46b0 SHA256: d10242073bf094c2cc37bc734a06d2c04121c00cdc17f0dc2b1bb1567384bcfd SHA1: 4aecf4e65b3ade0acf1b3df8503f279cfdccbc6b MD5sum: 5f387cafe1e602849f805420f9cc8ee8 Description: debug symbols for nextpnr-himbaechel-gowin-qt Build-Ids: 7b39b9b7f187edc80504f38415ce8d09b7218541 Package: nextpnr-himbaechel-xilinx Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 2657 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-himbaechel-xilinx-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel-xilinx-qt Replaces: nextpnr-himbaechel-xilinx-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx_0.10-6~bpo12+1~sjr2_amd64.deb Size: 884456 SHA512: ebbd9938b557392b77cd58c245e411e1857ef886e17181caeb2f64a57ea3d84ce18c04109d944bcd97b55868a38faddd856263a2f4bd0287408bf3ce76466f10 SHA256: 6d89bb059348bc00c39a7ca9ba7c2a791853628b28d6be8d1cef0cd3ee538d18 SHA1: 75ddd1d0f817feed036945aad54680c672b97104 MD5sum: 85760d11b8ac2ff06712b39fd0479f87 Description: FPGA place and route tool for Xilinx Artix7/Spartan7/Zynq7 nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-xilinx supports the Xilinx Artix7/Spartan7/Zynq7 series of FPGAs. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-himbaechel-xilinx-qt package. Package: nextpnr-himbaechel-xilinx-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 212700 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx-chipdb_0.10-6~bpo12+1~sjr2_amd64.deb Size: 4729824 SHA512: 803be11bf2d80d69e410fa0b646e3a5c73f5bdeabbae939e8c006606d0557780ce92964f6760d6e41d213a3a0ec9486807a698f879e94e1ca26d7b4ac22fcd55 SHA256: 10351e3453b2e1b755d47cb9934502ed265180250435a6c62f7623fa7960bcec SHA1: bf0df56a6f6a0de92556355c7c2927ae95395ac1 MD5sum: afc98ceb0ac93fa0ea6fee483825a6cc Description: FPGA place and route tool for Xilinx Artix7/Spartan7/Zynq7 -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-himbaechel-xilinx-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 24446 Depends: nextpnr-himbaechel-xilinx (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx-dbgsym_0.10-6~bpo12+1~sjr2_amd64.deb Size: 23859688 SHA512: 5a8263e2e949eb9db25597c971c596d3792048d4ab0595fff6329f3e78cf1f412b9c9fda8b295f301263cea9ea71a2f1fd57b8ab68a9f2a82c2e6d412d8a24cb SHA256: bd53e3b4ea07f4087452ee93083f25842d88c319eb0515c78e9ff04af78ed29c SHA1: f89675e631c2db634ce18fb5ff3826ec20d9e2a9 MD5sum: dfb4df957a794614da63ed8b74626e40 Description: debug symbols for nextpnr-himbaechel-xilinx Build-Ids: de376f0755e894cf8174d4013db5fa8b6a006e05 Package: nextpnr-himbaechel-xilinx-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 4931 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-himbaechel-xilinx-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel-xilinx Replaces: nextpnr-himbaechel-xilinx Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx-qt_0.10-6~bpo12+1~sjr2_amd64.deb Size: 1555604 SHA512: cdd41672c2dc9eab44e4ae9e1756f21f1fb6cceaeb1e5082c835719cf8ce931b5dbb4a7482143559db68e85b4f24a82f0bf544c39337fcf16aa73ce87757e1b7 SHA256: 5df949de3719d8d96a575048731fb01469679c5f2e65b196b49f7c0f836b196f SHA1: f790d7d372681d130fbf37d8d2a09d4973329a95 MD5sum: 4e2cb9bb65009cab0671c928f7617624 Description: FPGA place and route tool for Xilinx Artix7/Spartan7/Zynq7 - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-xilinx supports the Xilinx Artix7/Spartan7/Zynq7 series of FPGAs. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-himbaechel-xilinx package. Package: nextpnr-himbaechel-xilinx-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 34881 Depends: nextpnr-himbaechel-xilinx-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx-qt-dbgsym_0.10-6~bpo12+1~sjr2_amd64.deb Size: 34107508 SHA512: f7932aeb5b613698679338b85ee933993f2218f50a6f0fc8ae4d7c85f13e711c89d3762d6c26ac0205aacde6ed36b4b4cfb34d96d500c7f6a726201411dd9024 SHA256: 6bbe06d8edc04b0897a800a05eda9cce81983115bf14b73ec52f2c0f145cbffb SHA1: 1c2fd2887d0c3a5db7fc87941b024569556f381c MD5sum: 735ec23c024545a81a2cad35d05f1a10 Description: debug symbols for nextpnr-himbaechel-xilinx-qt Build-Ids: c5baa6027000d6dfeb4d2fb088a7521e38053d71 Package: nextpnr-ice40 Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 2337 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-ice40-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys, fpga-icestorm Conflicts: nextpnr-ice40-qt Replaces: nextpnr-ice40-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ice40_0.10-6~bpo12+1~sjr2_amd64.deb Size: 777116 SHA512: 9c057e80576e86723fcd7587480c6757a25e38320d1ac9700ec37f2f85e4a952888b75b1d216e9735600205e779d64e60c3d0e962791c8019893e1868cf608c7 SHA256: 45b3c7423ed2c475945e0b418a4eec6db0a819afef8e6894cccc101f7461acf0 SHA1: 15a64a687903b78d994e234151d129e2453e102c MD5sum: b188ad604c5f4fdbda56cffcceb5f5a1 Description: FPGA place and route tool for Lattice iCE40 nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-ice40 supports the Lattice iCE40 series of FPGAs and uses the hardware description chipdb from the fpga-icestorm package. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-ice40-qt package. Package: nextpnr-ice40-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 224817 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ice40-chipdb_0.10-6~bpo12+1~sjr2_amd64.deb Size: 31532084 SHA512: 7fb8706a994198654409076162d582328cfae2649198dec5e6e03381ee5fdd736197095d2b4acdf270fb1c7241ba27803a4fe4c9cf7fe5505f23e1cff573f7c5 SHA256: a13f68ed15972d3505812a1ae5ace8539805adcf951119bc4494ec52fa88924f SHA1: 62b5bf2e85874718020cc7eb324785333681f414 MD5sum: 06444ccd87353c1e526b962dff54b23d Description: FPGA place and route tool for Lattice iCE40 -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-ice40-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 21347 Depends: nextpnr-ice40 (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-ice40-dbgsym_0.10-6~bpo12+1~sjr2_amd64.deb Size: 20832716 SHA512: c8ecd00541aa17dd98a5c2d7633ef4c3ab07508fdaf273026db4170e2e11916252a8a59eb94e553d6276b56372ecea9bfee35c42785ff7db35a654ffccfa1547 SHA256: c97371ba8acb218aee4622eae3c858e9de23e4be51813a4779c20419ba68d6bb SHA1: 3d7dae225f53ffeb92c5525623f62e51ec4f7e09 MD5sum: e3328d3d4b5f403b0954b13ff390ab58 Description: debug symbols for nextpnr-ice40 Build-Ids: 47c4620c80ce9211ddddc214020376465cf82c12 Package: nextpnr-ice40-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 4547 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-ice40-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys, fpga-icestorm Conflicts: nextpnr-ice40 Replaces: nextpnr-ice40 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ice40-qt_0.10-6~bpo12+1~sjr2_amd64.deb Size: 1423340 SHA512: ff77017577eed808af313d0ce3955682968bbcc8d50b1083ff14d07dce0374a15d64ae947c3c3647ecd54230a661d54ce6b617adc0c12fb2c2ec871575f31a84 SHA256: a24cc1f3956c9255302a9f39404adb13d86b6487c7bef2722c5be1a29db11b76 SHA1: aa2900d16873edec69641e436b5f0747d63bea01 MD5sum: 4e074e79b7854cfeed9984d2ce846827 Description: FPGA place and route tool for Lattice iCE40 - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-ice40 supports the Lattice iCE40 series of FPGAs and uses the hardware description chipdb from the fpga-icestorm package. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-ice40 package. Package: nextpnr-ice40-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 31853 Depends: nextpnr-ice40-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-ice40-qt-dbgsym_0.10-6~bpo12+1~sjr2_amd64.deb Size: 31163876 SHA512: 4fad1a255ec4660d46f401a86cac3bf061f414d241f396f58f74f12ce55978ed233cfa1f3ce12b4e81ffe4c07b970c2d00a567db8df0a22e408eaf0c7fe5b557 SHA256: bf634d565cd00d74499db49609cc2aeb3213e6182663181a4ef8e964ceb6a14b SHA1: 1f09c2d7a5b9334ed6c94f6066bdaeb97c17ee19 MD5sum: 93df4d0ffddf868e14b1ec74493790f5 Description: debug symbols for nextpnr-ice40-qt Build-Ids: 01de6417f339cf4c5c80c9864af559571df42fd8 Package: prjxray Version: 0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 4421 Depends: libc6 (>= 2.34), libgcc-s1 (>= 3.0), libstdc++6 (>= 11) Homepage: https://github.com/f4pga/prjxray Priority: optional Section: electronics Filename: pool/main/p/prjxray/prjxray_0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr_amd64.deb Size: 656752 SHA512: 93a7318319200bc3d72bebace356f051c3b2731a748e266911a236659e9b495b063d40f6398074170e19f6ca37f6600c48446230dc7aa9ab7e814c07f6c637c6 SHA256: 2e00533bd29b9d3e6bd09fcc76eb4c4ff8499215e6c1992a5f779283410b6ceb SHA1: fd7e4f1f493c09cf645955c216f87fcf08d0f926 MD5sum: f0e9ab94b693c5760ea248b65d307145 Description: FPGA bitstream tools for Xilinx Artix7/Kintex7/Spartan7/Zynq7 This is a collection of tools to dissect and analyze Xilinx 7-series FPGA bitstreams. . You may find these useful if you are developing for one of these FPGAs, otherwise you don't need this package. Package: prjxray-database Source: prjxray Version: 0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr Architecture: all Maintainer: Debian Electronics Team Installed-Size: 415597 Homepage: https://github.com/f4pga/prjxray Priority: optional Section: electronics Filename: pool/main/p/prjxray/prjxray-database_0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr_all.deb Size: 6758560 SHA512: 4c2ca504e3b7a4c2912c36fc0d919931cabef369b172fbc6f3386458ab5df7b29d8a55c00ee208b06464da6ea0fd58fe110b21e1acf6b0a032d806830004f819 SHA256: 7f00b855fb8ddf1a8af7ce4be7162eee87f463c184167716d88fa32b0ca3cf77 SHA1: cb5ff0c936c9e74e1d36a2df6a8fcb0a5bca3ba1 MD5sum: 46803774f40610fdec6a86bf2641f0f8 Description: FPGA tile database for Xilinx Artix7/Kintex7/Spartan7/Zynq7 This is a database of the various block elements found in these FPGAs. . You will typically not use this package directly. Unless you are writing an FPGA toolchain, you probably want to use the nextpnr-himbaechel-xilinx package instead. Package: prjxray-dbgsym Source: prjxray Version: 0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 29834 Depends: prjxray (= 0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr) Priority: optional Section: debug Filename: pool/main/p/prjxray/prjxray-dbgsym_0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr_amd64.deb Size: 29532920 SHA512: 0e2900a4017e1d7d2411ddc6b503ed7f0cd5012a8def49bb7f161c15a490cf1ea0fe20db63c01a843790a4e03583d94479ef26f217d8be56088e5c3926431a0d SHA256: b92e266b957de5e97a44afde0a920cff98e8606c1dead77bbe3d494efd682bcb SHA1: a3d3e54c980867aa1d3b0fd4819c89c6ae6bab51 MD5sum: a46556bf09e23ae68d9d7045bf1a4d62 Description: debug symbols for prjxray Build-Ids: 56f6b3d7e855993148cdd01f28eb5e675e434044 825422d6c6aae7dd387837979c71e3b533c6f60f 86bd4d05ff9e9de4d3ba64613fd547fd6435c896 93519d5186361c8d48b26d6da279c73f01f5333d c8f09e9898ac7ff2ef49e8775556bb0c24005125 e71f54ede9a2e3044e5fbb008ea538515e755902 fad64d162c1c92b9ce3d242b8cb3214ffe4debb5 Package: python3-apycula Source: apycula Version: 0.32+dfsg1-1~bpo12+1~sjr Architecture: all Maintainer: Debian Electronics Team Installed-Size: 4183 Depends: python3-msgspec | python3-msgpack, python3-msgspec | python3-cattr, python3-numpy, python3:any Provides: fpga-apicula Homepage: https://github.com/YosysHQ/apicula Priority: optional Section: electronics Filename: pool/main/a/apycula/python3-apycula_0.32+dfsg1-1~bpo12+1~sjr_all.deb Size: 3530016 SHA256: 4d486916ef698cd38a3ad0091dbe47865e3ab4c40d864d695cd6735f9c363395 SHA1: abfde4c1e76708bf65b11179a0ecfc8cb6ee37bc MD5sum: 8566bb0c88295f363e54c02fbbe254b6 Description: Tools to generate Gowin FPGA bitstreams Project Apicula provides documentation and tools for the bitstream format used by Gowin GW1N series of FPGAs. . This package contains the bitstream tools, apycula python library and chipdb files. Package: python3-peppercorn Source: prjpeppercorn Version: 1.12-1~bpo12+1~sjr Architecture: all Maintainer: Debian Electronics Team Installed-Size: 323 Depends: python3, fpga-peppercorn-delay Homepage: https://github.com/YosysHQ/prjpeppercorn Priority: optional Section: electronics Filename: pool/main/p/prjpeppercorn/python3-peppercorn_1.12-1~bpo12+1~sjr_all.deb Size: 26336 SHA256: f945d8f41dbbe81ed52ef919954b0fc23a84e1bd8509b3ad731bfa6ea2468ce1 SHA1: 843b171854afc4322f1d875ae259755a12fe9a97 MD5sum: 0c1861447639219be9d4f847ec25cedf Description: Library for interacting with Cologne Chip GateMate FPGA bitstreams Project Peppercorn provides documentation and tools for the bitstream used by Cologne Chip "GateMate" FPGAs. . This package contains the Python library. Package: python3-pytrellis Source: prjtrellis Version: 1.4-2~bpo12+1 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 3850 Depends: libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.0), libpython3.11 (>= 3.11.0), libstdc++6 (>= 11), python3, fpga-trellis-database Homepage: https://github.com/YosysHQ/prjtrellis Priority: optional Section: electronics Filename: pool/main/p/prjtrellis/python3-pytrellis_1.4-2~bpo12+1_amd64.deb Size: 851156 SHA256: bb84c2ae7ce8c9f44dae95df056b5917262e6b1e020d79b534e8ec67bebb9ca1 SHA1: 1266eb4a7e6d455afab6a2c3e5e4c20edebe6404 MD5sum: 6bfbf0f5b2f3f7b7902f4a88bd7ff511 Description: Library for interacting with Lattice ECP5 FPGA bitstreams Project Trellis provides documentation and tools for the bitstream used by Lattice ECP5 series FPGAs. . This package contains the Python library. Package: python3-pytrellis-dbgsym Source: prjtrellis Version: 1.4-2~bpo12+1 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 25480 Depends: python3-pytrellis (= 1.4-2~bpo12+1) Priority: optional Section: debug Filename: pool/main/p/prjtrellis/python3-pytrellis-dbgsym_1.4-2~bpo12+1_amd64.deb Size: 23773148 SHA256: ecc47e06ed2ec4808aed6ae262cef7454ddaffd84d084bb06e1cf2a37f4a7ace SHA1: 18ea2b6eeb4d6b99af0344e22c763e2b35844a9d MD5sum: aa3c563e0c7e6d7a374150576c1d29f5 Description: debug symbols for python3-pytrellis Build-Ids: b427fdd96c50ed40baacb7e75b2a889d5421b820 Package: yosys Version: 0.33-5~bpo12+1 Architecture: amd64 Maintainer: Debian Science Maintainers Installed-Size: 12057 Depends: libc6 (>= 2.35), libffi8 (>= 3.4), libgcc-s1 (>= 3.3.1), libreadline8 (>= 6.0), libstdc++6 (>= 11), libtcl8.6 (>= 8.6.0), zlib1g (>= 1:1.2.0), python3:any, python3-click, yosys-abc (>= 0.32-1) Recommends: xdot Homepage: https://github.com/YosysHQ/yosys Priority: optional Section: electronics Filename: pool/main/y/yosys/yosys_0.33-5~bpo12+1_amd64.deb Size: 2968804 SHA256: bca5e88072219cab50c39d6abbd6bcc62c879561536175123019e96c7a2f1d8b SHA1: 326a3f195b525d0426fea0fbe3dd9007abb3b941 MD5sum: 4aeaf206306318bebdc8e2a6caef25cc Description: Framework for Verilog RTL synthesis This is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains. . Yosys can be adapted to perform any synthesis job by combining the existing passes (algorithms) using synthesis scripts and adding additional passes as needed by extending the yosys C++ code base. Package: yosys-abc Source: yosys Version: 0.33-5~bpo12+1 Architecture: amd64 Maintainer: Debian Science Maintainers Installed-Size: 14611 Depends: libbz2-1.0, libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libreadline8 (>= 6.0), libstdc++6 (>= 11), zlib1g (>= 1:1.1.4) Breaks: yosys (<< 0.32-1) Replaces: yosys (<< 0.32-1) Homepage: https://github.com/YosysHQ/yosys Priority: optional Section: electronics Filename: pool/main/y/yosys/yosys-abc_0.33-5~bpo12+1_amd64.deb Size: 5437644 SHA256: 9cf39560676136bfdd5ad215a9711da20f30b18994507194c1f8206be1696b62 SHA1: 502055f3637ba00db7d1875ecabef17d73136be4 MD5sum: d6c53e138a036d03e934b230f06fff3c Description: Sequential Logic Synthesis and Verification Algorithms ABC is a system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. It combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification. . This is a fork of berkeley-abc maintained by the YosysHQ team for use in the yosys RTL synthesis framework. Package: yosys-abc-dbgsym Source: yosys Version: 0.33-5~bpo12+1 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Science Maintainers Installed-Size: 26208 Depends: yosys-abc (= 0.33-5~bpo12+1) Priority: optional Section: debug Filename: pool/main/y/yosys/yosys-abc-dbgsym_0.33-5~bpo12+1_amd64.deb Size: 23202624 SHA256: a1cfbc62546f58e2f8648e43606e45387d1a251a46d2353541190f5c83457306 SHA1: 9663df9be83e9a5e095f88814c9ae6094da0b354 MD5sum: d58d106b8a13be42ade09adc04599110 Description: debug symbols for yosys-abc Build-Ids: 44602203d8ee5acca652990dae590e20a5786e92 Package: yosys-dbgsym Source: yosys Version: 0.33-5~bpo12+1 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Science Maintainers Installed-Size: 55426 Depends: yosys (= 0.33-5~bpo12+1) Priority: optional Section: debug Filename: pool/main/y/yosys/yosys-dbgsym_0.33-5~bpo12+1_amd64.deb Size: 51803420 SHA256: d35a34779a73b4051b445254f5c3474387074533e54f16b908c2d75f8e4b8969 SHA1: cbbaaa3f202db89d15090e8f5986cf1a53210469 MD5sum: c6f625ef6e8714187a9c18d6eadfeecd Description: debug symbols for yosys Build-Ids: 8a2602e92d0eb9cbd78e1eff8c67a2ef977f1336 d6f5947cd9699db48c6cd474da61af54b1a9d59a Package: yosys-dev Source: yosys Version: 0.33-5~bpo12+1 Architecture: amd64 Maintainer: Debian Science Maintainers Installed-Size: 506 Depends: tcl-dev, libffi-dev, libreadline-dev Homepage: https://github.com/YosysHQ/yosys Priority: optional Section: electronics Filename: pool/main/y/yosys/yosys-dev_0.33-5~bpo12+1_amd64.deb Size: 102112 SHA256: dbb1738c95168bfad7d378f5293c6aad65798195070ab8790c6e8837f94d3b6b SHA1: 406241b366fb7ce30d44cda4e6dea6cea590f5e5 MD5sum: f66633ef6abe2f2505ffde09d645d7f8 Description: Framework for Verilog RTL synthesis (development files) Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains. . Yosys can be adapted to perform any synthesis job by combining the existing passes (algorithms) using synthesis scripts and adding additional passes as needed by extending the yosys C++ code base. . This package contains the headers and programs needed to build yosys plugins. Package: yosys-doc Source: yosys Version: 0.33-5~bpo12+1 Architecture: all Maintainer: Debian Science Maintainers Installed-Size: 2179 Suggests: yosys Multi-Arch: foreign Homepage: https://github.com/YosysHQ/yosys Priority: optional Section: doc Filename: pool/main/y/yosys/yosys-doc_0.33-5~bpo12+1_all.deb Size: 2043192 SHA256: 34143f2c89dca9e6bdae51d9a4d78e2cf1c020c6efaefecf216c3413b581cea3 SHA1: 5918f53c66cc28806b5cdcf7fca3f0a35922925a MD5sum: 40e8528fd1b6a544e12702feea756483 Description: Framework for Verilog RTL synthesis (documentation) Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains. . Yosys can be adapted to perform any synthesis job by combining the existing passes (algorithms) using synthesis scripts and adding additional passes as needed by extending the yosys C++ code base. . This package contains the manual. Package: yosys-plugin-ghdl Version: 0.0~git20230419.5b64ccf-1~bpo12+2 Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 234 Depends: libc6 (>= 2.14), libgcc-s1 (>= 3.3.1), libghdl-3-0-0 (>= 3.0.0+dfsg2), libstdc++6 (>= 11) Homepage: https://github.com/ghdl/ghdl-yosys-plugin Priority: optional Section: electronics Filename: pool/main/y/yosys-plugin-ghdl/yosys-plugin-ghdl_0.0~git20230419.5b64ccf-1~bpo12+2_amd64.deb Size: 54564 SHA256: e89eb6e67f59c506c085186fcaa6cf42a9b1d6ab31b5f368b1fc9312a4f00b5c SHA1: d58da000f53af2180068a6c9172fc9a0e256869e MD5sum: 7e3e57be6a86904f07373cb9fb85cc73 Description: VHDL to RTL synthesis plugin using GHDL This yosys plugin allows running RTL synthesis from VHDL source code instead of yosys' native Verilog. . This allows a full synthesis flow from VHDL to hardware for FPGAs where the GHDL compiler is used to analyse the VHDL sources and yosys is used to perform logic optimization, technology mapping and convertion to netlist format. Package: yosys-plugin-ghdl-dbgsym Source: yosys-plugin-ghdl Version: 0.0~git20230419.5b64ccf-1~bpo12+2 Auto-Built-Package: debug-symbols Architecture: amd64 Maintainer: Debian Electronics Team Installed-Size: 668 Depends: yosys-plugin-ghdl (= 0.0~git20230419.5b64ccf-1~bpo12+2) Priority: optional Section: debug Filename: pool/main/y/yosys-plugin-ghdl/yosys-plugin-ghdl-dbgsym_0.0~git20230419.5b64ccf-1~bpo12+2_amd64.deb Size: 622036 SHA256: 16c9d250851db6a34c0dd0b26d31d8cb158629c09461132f1516f0ab5971c4cc SHA1: 41c44a894d727b69ecb5f940f8e398d6f30663a5 MD5sum: 2d6c55414e4a72b166dea38def4ff3ec Description: debug symbols for yosys-plugin-ghdl Build-Ids: 8926746d95f9d5f34e82030992372e15c8b6b190