Package: fpga-peppercorn Source: prjpeppercorn Version: 1.12-1~bpo12+1~sjr Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 726 Depends: libboost-program-options1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.0), libstdc++6 (>= 11) Homepage: https://github.com/YosysHQ/prjpeppercorn Priority: optional Section: electronics Filename: pool/main/p/prjpeppercorn/fpga-peppercorn_1.12-1~bpo12+1~sjr_ppc64el.deb Size: 117324 SHA256: b46b05fecee8937275d455ebf276324a52bdb4527c956595dd22e108a1bcca11 SHA1: 185012d4349d9ca235eb21ff4fbf7f54117ac5a7 MD5sum: 6b084fc211ae7ed487d30a83dcbdf8cd Description: Tools for interacting with Cologne Chip GateMate FPGA bitstreams Project Peppercorn provides documentation and tools for the bitstream used by Cologne Chip "GateMate" FPGAs. . This package contains tools for producing and analyzing bitstreams. Package: fpga-peppercorn-dbgsym Source: prjpeppercorn Version: 1.12-1~bpo12+1~sjr Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 3076 Depends: fpga-peppercorn (= 1.12-1~bpo12+1~sjr) Priority: optional Section: debug Filename: pool/main/p/prjpeppercorn/fpga-peppercorn-dbgsym_1.12-1~bpo12+1~sjr_ppc64el.deb Size: 2915336 SHA256: 244df24ef287821b91e10cd18fdc1c7edbc3ef9adf7ba3c9f0db168a3a86beef SHA1: ef10dab6abc393637cf9e857a86a9d64756d58c9 MD5sum: 3cf203fce6ac88f894c6cc21bcc389a7 Description: debug symbols for fpga-peppercorn Build-Ids: cc93a18dd3c4a1c552c36a36c7551165073f90d2 d9c13cb995a610ae9877a30a9ebdbdcca33ea4ba Package: fpga-peppercorn-delay Source: prjpeppercorn Version: 1.12-1~bpo12+1~sjr Architecture: all Maintainer: Debian Electronics Team Installed-Size: 4902 Homepage: https://github.com/YosysHQ/prjpeppercorn Priority: optional Section: electronics Filename: pool/main/p/prjpeppercorn/fpga-peppercorn-delay_1.12-1~bpo12+1~sjr_all.deb Size: 4165584 SHA256: 68bfc447d16c27af0b5c8a42c28c3c20754e540afa3aace6b3bf1d73cd6f8595 SHA1: 5b038d3e46fd48bdb696fc89feac534b4577e6ea MD5sum: 063fbbcd050c7609831b43bfae104380 Description: Propagation Delay Database for Cologne Chip GateMate FPGA bitstreams Project Peppercorn provides documentation and tools for the bitstream used by Cologne Chip "GateMate" FPGAs. . This package contains the expected best/typical/worst timings, as published by the manufacturer. Package: fpga-trellis Source: prjtrellis Version: 1.4-2~bpo12+1 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 2136 Depends: libboost-filesystem1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.0), libstdc++6 (>= 11), fpga-trellis-database Homepage: https://github.com/YosysHQ/prjtrellis Priority: optional Section: electronics Filename: pool/main/p/prjtrellis/fpga-trellis_1.4-2~bpo12+1_ppc64el.deb Size: 432988 SHA256: 34ff43133fb0df669a7cfb5f98f9a1166bf90dbf1309587ad0b4dc7d93298329 SHA1: 2653a62409c7de75182825abc01a3eadf49d9cd6 MD5sum: bf722e283a856c95faf9250a8ec4409c Description: Tools for interacting with Lattice ECP5 FPGA bitstreams Project Trellis provides documentation and tools for the bitstream used by Lattice ECP5 series FPGAs. . This package contains tools for producing and analyzing bitstreams. Package: fpga-trellis-database Source: prjtrellis Version: 1.4-2~bpo12+1 Architecture: all Maintainer: Debian Electronics Team Installed-Size: 75917 Homepage: https://github.com/YosysHQ/prjtrellis Priority: optional Section: electronics Filename: pool/main/p/prjtrellis/fpga-trellis-database_1.4-2~bpo12+1_all.deb Size: 951208 SHA256: 536ed777bc908f366edcb17587e0a090c9638c797da69047c69af873abc57858 SHA1: 6a6159937008dc3b9ed373d963e6c14581c95d8e MD5sum: fa1a380858380d5ccb75555517592e72 Description: Lattice ECP5 FPGA bitstream database Project Trellis provides documentation and tools for the bitstream used by Lattice ECP5 series FPGAs. . This package contains the machine readable bitstream descriptions. Package: fpga-trellis-dbgsym Source: prjtrellis Version: 1.4-2~bpo12+1 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 9264 Depends: fpga-trellis (= 1.4-2~bpo12+1) Priority: optional Section: debug Filename: pool/main/p/prjtrellis/fpga-trellis-dbgsym_1.4-2~bpo12+1_ppc64el.deb Size: 9008460 SHA256: 6828a6284fb1c6c823f373f51f49038231cb0ebac52aa282c559c6b6db1309e8 SHA1: 983913973a25e229395d3c6848863b8904bf218f MD5sum: 86c27d238c72bac52639e4dede1fc9cd Description: debug symbols for fpga-trellis Build-Ids: 3a785045061284d1d1c481bf24fce249856ce5b0 5d8eeb936f808a34eade88875a7d2842f5f92e05 94cf1f73157211aadab01336a6851373704a3e14 9b8e379d5a3eef1ca696d0856ebc0088a861edf2 b4780d2d121abcc1f2d95f5af9eecb68a8505917 c15c78d4deb41788703fd1c642a44812678c6ded Package: iverilog Version: 12.0-2~bpo12+1 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 8964 Depends: libbz2-1.0, libc6 (>= 2.35), libgcc-s1 (>= 3.0), libreadline8 (>= 6.0), libstdc++6 (>= 11), zlib1g (>= 1:1.2.0) Suggests: gtkwave Breaks: verilog (<< 10.2-1.1~) Replaces: verilog (<< 10.2-1.1~) Provides: verilog Homepage: http://iverilog.icarus.com Priority: optional Section: electronics Filename: pool/main/i/iverilog/iverilog_12.0-2~bpo12+1_ppc64el.deb Size: 2013640 SHA256: 3e5605830e41f6e13c845eabd0dda837d2600362f673f4043b0a8ce62e190cd1 SHA1: 2c937315966a53875426a75d34b3d37a8c96e0bd MD5sum: 86e5cf5de2b6d5d3f4ed5411638c7af3 Description: Icarus verilog compiler Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs. . The compiler can target either simulation, or netlist (EDIF). Package: iverilog-dbgsym Source: iverilog Version: 12.0-2~bpo12+1 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 19235 Depends: iverilog (= 12.0-2~bpo12+1) Priority: optional Section: debug Filename: pool/main/i/iverilog/iverilog-dbgsym_12.0-2~bpo12+1_ppc64el.deb Size: 18579080 SHA256: 780dee934c38bb45df3cce329dfa16cf0867c542ff46491628b2515ef701ce41 SHA1: 088b02b02e4ecac815663f6b6f6fe6dd1d8fad37 MD5sum: 71ace402edddc1a01d1abe6f1b7faab4 Description: debug symbols for iverilog Build-Ids: 1ff7377b45cc6b8fce0329fa8efd4058ac07bc9d 2373c9f878901b86bf29641c0e24a87d792cdc06 2897ffe318117282e91b22245586c198097429fc 2a9d852c8fac11284724e3ffc330fa0359d2569e 392af26cfbd0c536cc1ef9eee1ead735c0f804d4 4cec30c93fdad82f9c956f47186212c28c26dfc4 5502c5947028804f60fbb4f0ea20b52f77e37601 5574fcea311337b0834830e21f1c201ba8de20d2 6fa56bbf5a2944706bf79f9c85446875dab61943 71d5261a181a09455588ed36df94f481ad92ddb3 745a190069e5ab9d39b54a946f1693b2815ede93 7fcaacdc799ad83c93a9c4b41aeb83affad76099 8617813010a9057a100245d79f22dbc6f3d08398 ad3509de0e2f9a6a93c8d9a8babb2e5eeff436d8 af0cd968439c5e22c985a38fea22ee2be61bec57 be6ee87aa2bb4480229e344194ea2c89a870624b c03a2dcc55dc120f0a3172be9dc29fa4833ce398 cfca493c2d42aba4531e1e8551bc0bcf9f937e7b de2a5fcbc3cf690bc4f83f5e4cc99c0af1d9af09 de64f2a19ca8ef08f0fd246f57d0284f2b531bf3 e9747bf85787b0a7af494a6b20692e684de46814 Package: nextpnr-ecp5 Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 3809 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-ecp5-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-ecp5-qt Replaces: nextpnr-ecp5-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ecp5_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 1013164 SHA512: 679278e82953fcae4855db550b51981eb332e440f1f1e95a0a1d26577ba82583daf2c39568fce394890de504397a4c73812ca7a1339aa831c6176683e1d5a83a SHA256: 4a85030082086679ccfedbddea7252057b3913371cc11a8a1dc1bc93212c3430 SHA1: 104383471afc9afc38566bcfd33ead86e087811e MD5sum: 7a5e8f2e70fde80df60697ba9fde9d71 Description: FPGA place and route tool for Lattice ECP5 nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-ecp5 supports the Lattice ECP5 series of FPGAs. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-ecp5-qt package. Package: nextpnr-ecp5-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 102547 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ecp5-chipdb_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 2916572 SHA512: ad6c4a9bc6270b1c1d46e78297a9c5b9e837e8d1faf5f2483d5cf7d29f117edcdebcfda21a0e837054f47292378f3f0e45f9f5eade7a6a3ce6432efc3b34b9a7 SHA256: 59849b054a888e4a47f05ba3f482dddde1dcb139217c1d63a88a899f79b0ed37 SHA1: 48a307c1991dcb9e9041e40a43d579107daeb609 MD5sum: 3be68a6f6918b0eab96a3de82b23d5fc Description: FPGA place and route tool for Lattice ECP5 -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-ecp5-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 26308 Depends: nextpnr-ecp5 (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-ecp5-dbgsym_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 24266868 SHA512: 45365a1b57a53a5698e25b3f2cd4f571db7d2a20df3de5b6632e42604ef4d955d8ddec41ec4574284a05422b2e8637aa9000158df3e64f600b14a69f5629c071 SHA256: 2a2de86cb3d632ea914066da6f78b382e1f2330f396d72d67aa371c09a845e1b SHA1: 6c2f02745bc4dbbc4c7167fcf10c0a0093d151f9 MD5sum: fd0f203c7fbb4ae7a1fc4e4b48eb0399 Description: debug symbols for nextpnr-ecp5 Build-Ids: 88eae14afb7418bef5e1aae9cfa0a884d5413200 Package: nextpnr-ecp5-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 6579 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-ecp5-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-ecp5 Replaces: nextpnr-ecp5 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ecp5-qt_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 1704908 SHA512: 4dfaf1e2faad86c5fc71dd2235d63152fafe47528da2d37500eba8b2c4e0745e008ef921ddcf0e78e1c0db0ab63d0c370c4fb8be62844bb3b4f3f2cf9c51bb79 SHA256: eff3f775e281be61d77ee6fc8b75f62e1a804c54a347cfa33f8dff24de102793 SHA1: b1b23279d1b88981b37e5772693aceef84f5ccd8 MD5sum: 0f2206ba414836073bae14de09b85a3e Description: FPGA place and route tool for Lattice ECP5 - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-ecp5 supports the Lattice ECP5 series of FPGAs. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-ecp5 package. Package: nextpnr-ecp5-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 37783 Depends: nextpnr-ecp5-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-ecp5-qt-dbgsym_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 35067616 SHA512: 9453fd72e71030d432f80834a3a21543321c330560b1bf95c5367904d6abae4cc60c0962393911fb38e6d1c00c11f8087fcca6520fe0da35cd1bf844b6e2d08e SHA256: dd8f7437793437f6f723a6ca87700ed07faa881d58e6fc25ca25656e1a549853 SHA1: 12edb8a89b7ce1dbadf424cf72cc135bdc24eb94 MD5sum: 32dc46a5f549856ae39b3f983c4c4bd6 Description: debug symbols for nextpnr-ecp5-qt Build-Ids: 2e824a9f3e74c7b39f3d91b1dc4846c0bc2925c0 Package: nextpnr-generic Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 2736 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libstdc++6 (>= 11) Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-generic_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 765156 SHA512: 25fb49496a3e10ef1d46ee67f74433730fe1287b67703ff8a4593cd700c7c86ee35a1267c9b90c9de29bc1c13999915d52d89a231b60f4aa258fef98b2c5c3d6 SHA256: e485f2e5a1612ba9b3d9682d1582cdde083d092ef18904cf9c75794a158d49d2 SHA1: faea65da78de63bd19f1a829c7e74c9736072a1d MD5sum: 5048663f01f5196b6a15d476a616f7b5 Description: FPGA place and route tool for Generic FPGAs nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-generic supports nextpnr's synthetic "generic" FPGA. Package: nextpnr-generic-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 23260 Depends: nextpnr-generic (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-generic-dbgsym_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 21410236 SHA512: fb075d15cd94251f1d2d2449ea74ebb7c8b5dd232083810cc4063878a2374f6d31285125a0d3df8235e09394bd0bff1e648a2da251cb4a7fec634f6b0fa9cb79 SHA256: eb660aebdbd8def12856d48beca3b7ba6253ee9d5ffc4f03bb34c8df93408548 SHA1: 2dba07b909f78a5c78fc4cbeed9bdf523d47f1f1 MD5sum: bc1992539a6878d13f2b116cb4269c36 Description: debug symbols for nextpnr-generic Build-Ids: d1d248fbaf0bde00f1de008d907c98a7cfcd7e91 Package: nextpnr-gowin Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: all Maintainer: Debian Electronics Team Installed-Size: 25 Depends: nextpnr-himbaechel-gowin Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: oldlibs Filename: pool/main/n/nextpnr/nextpnr-gowin_0.10-6~bpo12+1~sjr2_all.deb Size: 8328 SHA512: b77b998499c3e83bdd8a23a8bb0fbda22fee6f7e91c2093e9e4aab3fa48609d8422d08b4b781a2291621fbbad1b0fd8057388bb6645d1cfbd5a97a68adbfdfb8 SHA256: 6237e6a382c139d63a2ec3dbf7f3d68edbf37da8b60a20336da54fd8a6130eea SHA1: 749345b1d5b3c17dedf02ea92ce385aa102f6428 MD5sum: 274ea915800886f8c51273b5104c301a Description: transitional dummy package -- replaced by nextpnr-himbaechel This is a transitional package. It can safely be removed. Package: nextpnr-gowin-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: all Maintainer: Debian Electronics Team Installed-Size: 24 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: oldlibs Filename: pool/main/n/nextpnr/nextpnr-gowin-chipdb_0.10-6~bpo12+1~sjr2_all.deb Size: 7976 SHA512: fc0e9b93702e3b7b4de6016b45b320dc339f22f24ad602f2f5a0bf6bb15a7721b5c6879a58f00d0947aa6f3d628b8bb84b48b647bc187dba8e6a163c924c075d SHA256: 398f8d816611f5b27cc3fba6737d2b1fdedc700c2a75c781a33a4e9948ef5b23 SHA1: 77148239043b525dd781539429bee69873a1ed6f MD5sum: 1a1dc6681b3fa77e8440d1521ad993bd Description: transitional dummy package -- replaced by nextpnr-himbaechel This is a transitional package. It can safely be removed. Package: nextpnr-gowin-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: all Maintainer: Debian Electronics Team Installed-Size: 24 Depends: nextpnr-himbaechel-gowin-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: oldlibs Filename: pool/main/n/nextpnr/nextpnr-gowin-qt_0.10-6~bpo12+1~sjr2_all.deb Size: 7984 SHA512: c37debbfb70f3973e933694b82a80309d71d23178d2ae67b13db6275b0ad29fca2453c32b7b57f738883b519ac0099830e9dae067281a29587e11c878f42e63b SHA256: 4cd94662b25f2dd22b2fba36836fdd290a61e23fc3398e99afeb66122c7df69d SHA1: d6c60bf5eacbe9c657a11f2e0255a79daa37d617 MD5sum: dff1e7e2c12db96810759080be4c1e60 Description: transitional dummy package -- replaced by nextpnr-himbaechel This is a transitional package. It can safely be removed. Package: nextpnr-himbaechel-gatemate Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 3233 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-himbaechel-gatemate-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel-gatemate-qt Replaces: nextpnr-himbaechel-gatemate-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 917980 SHA512: bb3e922bb0dc02ed668d3d609bc03f6ab817c27467486783bad8dab09f2ab52f55b58821e7b6fbab6ee3d860f79fc35df10d405d3b3baa04c35592e55b87fe14 SHA256: 860e4127d129a5e82e7a71a1e3da807b302b8058d50e8fba7db2ee26a3b1a837 SHA1: 50842a75ccbb7d789a717191e7b291ce6be126e2 MD5sum: 1c137be3ec94c5bde61cd2a42d8d5e2e Description: FPGA place and route tool for Cologne Chip GateMate nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-gatemate supports the Cologne Chip GateMate series of FPGAs. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-himbaechel-gatemate-qt package. Package: nextpnr-himbaechel-gatemate-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 29728 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate-chipdb_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 617376 SHA512: cb59dca1d915494ad229d16174066010357dfad8714e194c3d07d5b305f7e1a4794efddcb2f7b88644804cfa753fa1124e06bb8393ba80451c9725082580aca6 SHA256: a94d7c2c65d8272f331de31ccdf97d5ecbcfc34b4a1f77e0802a013375641438 SHA1: 891b0772d026ff19794ede7e65315dcfb454ba67 MD5sum: 6b32ab675b6fb3229584fe301e776a21 Description: FPGA place and route tool for Cologne Chip GateMate -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-himbaechel-gatemate-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 26847 Depends: nextpnr-himbaechel-gatemate (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate-dbgsym_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 24674056 SHA512: d5defc32e79c6b48cd796c6cc706e178befaa9f38091c2799a80ddec9d182dd9bf142afe2f985729c03db64631b799233b13e611514d6827441ed72e3671bc19 SHA256: d4e9b74745fc13574df3dacf9d5adbdc9fd85e758f01ffae61ebb7ca9b1c5c0b SHA1: 379106d505b5a8f49c1ce16fc0c6905fe7e2f7fc MD5sum: 04c712b73ca5a327232acb1b05580c41 Description: debug symbols for nextpnr-himbaechel-gatemate Build-Ids: 7a3afbc0aa1e876f0fcd867bb3c4c7a7a215b1dd Package: nextpnr-himbaechel-gatemate-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 6003 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-himbaechel-gatemate-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel-gatemate Replaces: nextpnr-himbaechel-gatemate Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate-qt_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 1602976 SHA512: 807d14f21416d10858a631d60f272a53e0ba9de0583c2af7bb91f9eb66d74f13e658412319caa3af3f368b936bb6391e5e100c605c4644c3a39b1e0c5c8a2c8e SHA256: e1d2249a2640923a0ee9316172380957f4dcf067009edee24201e5a7d3fbac22 SHA1: e034738bf4c767a4898d854ed93aaebb34df007e MD5sum: 9a4bf200d7e1af7ac41bab11fbe4257d Description: FPGA place and route tool for Cologne Chip GateMate - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-gatemate supports the Cologne Chip GateMate series of FPGAs. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-himbaechel-gatemate package. Package: nextpnr-himbaechel-gatemate-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 37834 Depends: nextpnr-himbaechel-gatemate-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gatemate-qt-dbgsym_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 34964224 SHA512: a90f0a16239c6988443f0098a1737d666ebb2ab611a756944e9b426845a06d1bd0fadfa82be60ab1e7b2cfe7292af0651b84ddbf887ca3b00f729139597da1bb SHA256: 82f51d91746c91927a1909ab596998f438ddbe5a075cea9b08df90ba1a0539f2 SHA1: 1e5a25b7631677c5b5aa3f44c4101bfa19740130 MD5sum: edefb880d4013a162299ffa197097316 Description: debug symbols for nextpnr-himbaechel-gatemate-qt Build-Ids: 95d833a10b23cd823ed098405734290e129b0553 Package: nextpnr-himbaechel-gowin Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 3105 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-himbaechel-gowin-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel, nextpnr-himbaechel-gowin-qt, nextpnr-himbaechel-qt Replaces: nextpnr-himbaechel, nextpnr-himbaechel-gowin-qt, nextpnr-himbaechel-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 892808 SHA512: b19dbecd20a8ad43cd0580cac99282c1f0e6d801faddf6d6af2dcd21277ed47a30880f7f03bed89e1e40f37431036ff75589909fe05dc21b74c4bc213f60225d SHA256: 35d47bd4954ef269e978503ebcf230fabf000a82a3ee30e0e7c5b45c1785f00c SHA1: 4c967c3e251d191cd191f9ccf946b53e3b80ed17 MD5sum: ea671dde4de4bd57534a29d4a868f1be Description: FPGA place and route tool for Gowin GW1N nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-gowin supports the Gowin GW1N series of FPGAs. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-himbaechel-gowin-qt package. Package: nextpnr-himbaechel-gowin-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 172673 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin-chipdb_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 3594268 SHA512: 84a0112d4909929da75b848f5f43e1860c1082d0599e8db8c2c3f3592ba34707789ea5dd844081699bf4721efde8bd522d0e6b5f98291618db15676e0aa3fb45 SHA256: b705ddb790c229cd996bfbed78165e0addd024a1dfc68049a86753820789eff6 SHA1: dc269ce8a1db99d2fbb4261069b41282491f0716 MD5sum: 7ffce0a41d771847594db32f1cd66215 Description: FPGA place and route tool for Gowin GW1N -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-himbaechel-gowin-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 25043 Depends: nextpnr-himbaechel-gowin (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin-dbgsym_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 23061916 SHA512: cc1a6b8104378f2e458a83e7dd0a487525a2d735be651b5c75a8dfa6512d4f2e3244cb0dc9e40876f5da5a2a89efd92f4485fa213d4e62eb83115dba886ae026 SHA256: bfe664d935ec4d4ce219ec70b17510eff019065e5234126ff8fc327f647b5078 SHA1: 30713bb0aa56f62af23175e17a610267c7522686 MD5sum: e62949b4d9bf25e168e93de5d456e1d6 Description: debug symbols for nextpnr-himbaechel-gowin Build-Ids: fd8a451190ec8008123f2407b3c4aa6a024bb7c6 Package: nextpnr-himbaechel-gowin-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 5875 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-himbaechel-gowin-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel, nextpnr-himbaechel-gowin, nextpnr-himbaechel-qt Replaces: nextpnr-himbaechel, nextpnr-himbaechel-gowin, nextpnr-himbaechel-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin-qt_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 1577980 SHA512: 6d87d4a84530411e334ad2e1fd7f9956a263ceac16ddc4715a42b02b24db2ec2174616093bf1a916f9384ef990a3af2f3a3d0b48c9c916068225c4a8f4ebf234 SHA256: bc447245679ba39c82db5f4ace06c496d66be795d3cdb4a9a0c278c30bb350ae SHA1: 082c2ddeb54272bf4a885a00127d2fc769c4b7e0 MD5sum: 0410a0ba493cb72b2b6217010ba48a56 Description: FPGA place and route tool for Gowin GW1N - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-gowin supports the Gowin GW1N series of FPGAs. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-himbaechel-gowin package. Package: nextpnr-himbaechel-gowin-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 36010 Depends: nextpnr-himbaechel-gowin-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-gowin-qt-dbgsym_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 33337392 SHA512: 07321382dc824901e65f1a84ae510234107805d7e5cd06336896d84d489d7caad8134255d8e8d419e23162257a32898230267fdb07d35c2a999ef606a3839a9f SHA256: 93f9d2585047fb56170f98327756bef9f4c7678c6859846d7df4418f682769b7 SHA1: 71070daee05a5b38a3766c4e6d9e6f7ef9acd3dd MD5sum: b82446929166922b1deb7bac3452096b Description: debug symbols for nextpnr-himbaechel-gowin-qt Build-Ids: d45c93d2150a5b430b6a601046f7c36ee45e9b7a Package: nextpnr-himbaechel-xilinx Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 3169 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-himbaechel-xilinx-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel-xilinx-qt Replaces: nextpnr-himbaechel-xilinx-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 913776 SHA512: f3055f7b533823aee2887e018294d05854e02d195e12b4fc2e5468d36c110c8d9f218b26eef75cfc36c1c0ae0bd835ab2e742fd2e09e2c9e3be784195ffee052 SHA256: 468367e38389d11b450c7543ac5bb4662701a69b358c0374ce14f2239ea2a1b7 SHA1: 1e18f3b166354b8f67b98d3bccfc2b467d249a93 MD5sum: ca9e7e35f3b349758444e19563f5dd2f Description: FPGA place and route tool for Xilinx Artix7/Spartan7/Zynq7 nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-xilinx supports the Xilinx Artix7/Spartan7/Zynq7 series of FPGAs. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-himbaechel-xilinx-qt package. Package: nextpnr-himbaechel-xilinx-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 212700 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx-chipdb_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 4729824 SHA512: 215cbf9afbb527db3e1f2d8a29ff93e52f6232de53ca019b2fc56110ac7519d2af877ffcd85be29dc9888ba96cd02884955b764e2437dfc6a50d4aeea08b3657 SHA256: 430ec0e92cb38b3c76d3921837d411ea2d679e5037c6fec7f62ad4ca77ab1d19 SHA1: d74d26535674a8912cf8953ff95a5f551b7e7d56 MD5sum: 14817b4ef8ebc428df14c9f81c888dc2 Description: FPGA place and route tool for Xilinx Artix7/Spartan7/Zynq7 -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-himbaechel-xilinx-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 25883 Depends: nextpnr-himbaechel-xilinx (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx-dbgsym_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 23832624 SHA512: e63e9c39d8591ee55e160a6e233de07fefc776198e7938f37b5b1602af244617acc4d3c191d7d74a28e9f528068bda64a51d14b05dc5a929a3c0b996506f9e57 SHA256: 78e1bbb9f564484f2c41eb1edc8ba4f37838a0485fe4bbfda4d4629008fc922e SHA1: 632aef95af0981613bcd3a09f65439c6cb6b0d44 MD5sum: fa76cfd3e253fe4520e9a4f8f75ca4f5 Description: debug symbols for nextpnr-himbaechel-xilinx Build-Ids: 572d1a77e9845abcd9f758b1fcfaaa6a9487040f Package: nextpnr-himbaechel-xilinx-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 5939 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-himbaechel-xilinx-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys Conflicts: nextpnr-himbaechel-xilinx Replaces: nextpnr-himbaechel-xilinx Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx-qt_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 1597328 SHA512: adc388534877a626894d8cd85402f47a4f84a693851420deb07c9f7df8a4b7e75497944ccc7c58733fc1ce206dc86df0bcf7972ec584bed4c3ef7baa753ba7cc SHA256: 29036841cd4d89af5e4d67f066caa5bbaf9892356b8ea567517468e86d37169c SHA1: f6ff1c138431a252de6da134158da541bce81755 MD5sum: 286bc394a6985fbba5193de7f0462b29 Description: FPGA place and route tool for Xilinx Artix7/Spartan7/Zynq7 - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-himbaechel-xilinx supports the Xilinx Artix7/Spartan7/Zynq7 series of FPGAs. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-himbaechel-xilinx package. Package: nextpnr-himbaechel-xilinx-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 36854 Depends: nextpnr-himbaechel-xilinx-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-himbaechel-xilinx-qt-dbgsym_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 34109904 SHA512: 161cf7e3dcff21069698789ea54e2e06b4dc2bb4e0e99de517a9bcfb81a0f00fc34f42c246941df9e688b03b78943536bfbb14ced3f0fcfee64bf479571e0e00 SHA256: 244d605fa69534a5675f670286f5400648452880be2fb8f4964943c2f3a0551a SHA1: 9931a4979ff0e5c5c5d9f123dddb87c7ebd89250 MD5sum: 30eb6388a62e713571082741a363b21b Description: debug symbols for nextpnr-himbaechel-xilinx-qt Build-Ids: 5e580629a46cd07e803378e56c8a1900ad601758 Package: nextpnr-ice40 Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 2797 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libstdc++6 (>= 12), nextpnr-ice40-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys, fpga-icestorm Conflicts: nextpnr-ice40-qt Replaces: nextpnr-ice40-qt Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ice40_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 801332 SHA512: c1e80776e4660fcdcdccdf063e48873051c02149f7eb0ffdc7322883832afcd57595a34f409c2a7f6f50621dfa452bb6b3c448aafd1951f968c86f4365f4344a SHA256: 43ace1e80391c200b65b4a2803f9a1f877abdda16026f143b9210f001e4411fa SHA1: b30155e4aaf8d1c4ac321322e09eff5776504813 MD5sum: 136ab1da5e0c979ddb1b497c05f805d1 Description: FPGA place and route tool for Lattice iCE40 nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-ice40 supports the Lattice iCE40 series of FPGAs and uses the hardware description chipdb from the fpga-icestorm package. . This package supports only the command-line interface, there is also a GUI version in the nextpnr-ice40-qt package. Package: nextpnr-ice40-chipdb Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 224817 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ice40-chipdb_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 31532088 SHA512: 5d463a1b9808aa83fde1392c375c3704d322eb7e5a46a2690e75be432ca6fe41fe06a6a29c1fba916c8d3744a848149ab8b19f69fe9123e529f68b6ae27f5d0c SHA256: 91599a341d7efaecbdfb220541baba3d861a0a5f87e562a12e1b5c1cb35105ee SHA1: 8a0de32b2de4e11e3ad678413d27378432f813bc MD5sum: 831b9f56ad77526a903a902856fe587b Description: FPGA place and route tool for Lattice iCE40 -- chipdb files nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . This package contains the chipdb FPGA layout description files. Package: nextpnr-ice40-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 22536 Depends: nextpnr-ice40 (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-ice40-dbgsym_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 20780420 SHA512: bc1e3b3904029fc84dbbbf4fdfc910454f29a216848b4e894ae5717bf02ef16519176c7fa83a292a04bc498c4c59691d8ccc1ffaac9ec5bbce8ab9ec8b558a4f SHA256: d89e5bc8fd9250161cb8f4ea68ff8c4ecefb0b0ce40847a6c7ffc3ffc119e211 SHA1: da9aa80d90c021ebf5c4aba653aec0fd67555cf2 MD5sum: f6e8acd7f7a6aff9cfa3b8ac23a58f8e Description: debug symbols for nextpnr-ice40 Build-Ids: dd081574e74f13e81722f6b10c2626597c8b83b2 Package: nextpnr-ice40-qt Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 5503 Depends: libboost-iostreams1.74.0 (>= 1.74.0+ds1), libboost-program-options1.74.0 (>= 1.74.0+ds1), libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libpython3.11 (>= 3.11.0), libqt5core5a (>= 5.15.1), libqt5gui5 (>= 5.1.0), libqt5gui5 (>= 5.14.1) | libqt5gui5-gles (>= 5.14.1), libqt5widgets5 (>= 5.14.1), libstdc++6 (>= 12), nextpnr-ice40-chipdb (= 0.10-6~bpo12+1~sjr2) Suggests: yosys, fpga-icestorm Conflicts: nextpnr-ice40 Replaces: nextpnr-ice40 Homepage: https://github.com/YosysHQ/nextpnr Priority: optional Section: electronics Filename: pool/main/n/nextpnr/nextpnr-ice40-qt_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 1460676 SHA512: 522050bed1d1f37c851f104935760e91f8bf57982268922afe3aed105d542e6e5ffdbedbbd72ff8cd3dbb2f49fde22b4fdf34f05361e35335bceca4763529763 SHA256: cf73d52ed6d47839b590b87b90ea2355ebcd5de21b2305e72d5a21f4c1b5e133 SHA1: 07448b2abfcc715bbf6849a9a4abfc3cc1633560 MD5sum: ebdc5a75280fb79d1c66332d2d81618f Description: FPGA place and route tool for Lattice iCE40 - with GUI nextpnr is a FPGA place and route tool. Its purpose is to turn a topological description of digital hardware produced by an FPGA logic synthesis tool such as yosys into an elaborate map of connections between the hardwired functional units available inside the FPGA's fabric. . In order to verify the fully implemented design for proper operation at high speed timing-analysis of the design is also supported. . nextpnr-ice40 supports the Lattice iCE40 series of FPGAs and uses the hardware description chipdb from the fpga-icestorm package. . This package supports both the GUI and command-line interfaces. A slimmer command-line only version is available in the nextpnr-ice40 package. Package: nextpnr-ice40-qt-dbgsym Source: nextpnr Version: 0.10-6~bpo12+1~sjr2 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 33640 Depends: nextpnr-ice40-qt (= 0.10-6~bpo12+1~sjr2) Priority: optional Section: debug Filename: pool/main/n/nextpnr/nextpnr-ice40-qt-dbgsym_0.10-6~bpo12+1~sjr2_ppc64el.deb Size: 31217312 SHA512: 712dfce5652d0ba9e863d3d099545271a8a904190d7f651d98312503e744ed15904d65e1b3bc488d7b3eb9072b3bc3e58c25f48587abaf4ef116c65d050dec47 SHA256: c47bb8fde19e30d672bfc8a0e33c6e96aafb9717cace930941f04cfa4f792f67 SHA1: 5bce6db3ef09b2f8be6695594627a2a72df7398f MD5sum: bd0371b62840416d1d829718126724ee Description: debug symbols for nextpnr-ice40-qt Build-Ids: 66fd9bbb6cca6e348ea770f52905b121ebfb5609 Package: prjxray-database Source: prjxray Version: 0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr Architecture: all Maintainer: Debian Electronics Team Installed-Size: 415597 Homepage: https://github.com/f4pga/prjxray Priority: optional Section: electronics Filename: pool/main/p/prjxray/prjxray-database_0.1.3356.gc9f02d85+~db20211214.g0a0added-1~bpo12+1~sjr_all.deb Size: 6758560 SHA512: 4c2ca504e3b7a4c2912c36fc0d919931cabef369b172fbc6f3386458ab5df7b29d8a55c00ee208b06464da6ea0fd58fe110b21e1acf6b0a032d806830004f819 SHA256: 7f00b855fb8ddf1a8af7ce4be7162eee87f463c184167716d88fa32b0ca3cf77 SHA1: cb5ff0c936c9e74e1d36a2df6a8fcb0a5bca3ba1 MD5sum: 46803774f40610fdec6a86bf2641f0f8 Description: FPGA tile database for Xilinx Artix7/Kintex7/Spartan7/Zynq7 This is a database of the various block elements found in these FPGAs. . You will typically not use this package directly. Unless you are writing an FPGA toolchain, you probably want to use the nextpnr-himbaechel-xilinx package instead. Package: python3-apycula Source: apycula Version: 0.32+dfsg1-1~bpo12+1~sjr Architecture: all Maintainer: Debian Electronics Team Installed-Size: 4183 Depends: python3-msgspec | python3-msgpack, python3-msgspec | python3-cattr, python3-numpy, python3:any Provides: fpga-apicula Homepage: https://github.com/YosysHQ/apicula Priority: optional Section: electronics Filename: pool/main/a/apycula/python3-apycula_0.32+dfsg1-1~bpo12+1~sjr_all.deb Size: 3530016 SHA256: 4d486916ef698cd38a3ad0091dbe47865e3ab4c40d864d695cd6735f9c363395 SHA1: abfde4c1e76708bf65b11179a0ecfc8cb6ee37bc MD5sum: 8566bb0c88295f363e54c02fbbe254b6 Description: Tools to generate Gowin FPGA bitstreams Project Apicula provides documentation and tools for the bitstream format used by Gowin GW1N series of FPGAs. . This package contains the bitstream tools, apycula python library and chipdb files. Package: python3-peppercorn Source: prjpeppercorn Version: 1.12-1~bpo12+1~sjr Architecture: all Maintainer: Debian Electronics Team Installed-Size: 323 Depends: python3, fpga-peppercorn-delay Homepage: https://github.com/YosysHQ/prjpeppercorn Priority: optional Section: electronics Filename: pool/main/p/prjpeppercorn/python3-peppercorn_1.12-1~bpo12+1~sjr_all.deb Size: 26336 SHA256: f945d8f41dbbe81ed52ef919954b0fc23a84e1bd8509b3ad731bfa6ea2468ce1 SHA1: 843b171854afc4322f1d875ae259755a12fe9a97 MD5sum: 0c1861447639219be9d4f847ec25cedf Description: Library for interacting with Cologne Chip GateMate FPGA bitstreams Project Peppercorn provides documentation and tools for the bitstream used by Cologne Chip "GateMate" FPGAs. . This package contains the Python library. Package: python3-pytrellis Source: prjtrellis Version: 1.4-2~bpo12+1 Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 4534 Depends: libboost-thread1.74.0 (>= 1.74.0+ds1), libc6 (>= 2.34), libgcc-s1 (>= 3.0), libpython3.11 (>= 3.11.0), libstdc++6 (>= 11), python3, fpga-trellis-database Homepage: https://github.com/YosysHQ/prjtrellis Priority: optional Section: electronics Filename: pool/main/p/prjtrellis/python3-pytrellis_1.4-2~bpo12+1_ppc64el.deb Size: 815404 SHA256: c21d5a223fc673eb7a1bc15d460d219db8a05054c1b2b928b7805391ef3e9a72 SHA1: c861329652802581fe63f892fa6e8f47617cbb27 MD5sum: bd77812c070d42f42a0ab27ea7eabe02 Description: Library for interacting with Lattice ECP5 FPGA bitstreams Project Trellis provides documentation and tools for the bitstream used by Lattice ECP5 series FPGAs. . This package contains the Python library. Package: python3-pytrellis-dbgsym Source: prjtrellis Version: 1.4-2~bpo12+1 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Electronics Team Installed-Size: 25196 Depends: python3-pytrellis (= 1.4-2~bpo12+1) Priority: optional Section: debug Filename: pool/main/p/prjtrellis/python3-pytrellis-dbgsym_1.4-2~bpo12+1_ppc64el.deb Size: 23477840 SHA256: b7adfca752a4119a273b82a34563a41e4ebfce7cee6be8d414ac28e43f02522a SHA1: 4f801a54b2f7a52661be0abbac1d5e604d7fda87 MD5sum: 4cacd56a617ce10c7dd546e5c9f36e35 Description: debug symbols for python3-pytrellis Build-Ids: 071629ea4a36e9bdcf16bb587228d4a489f35f7d Package: yosys Version: 0.33-5~bpo12+1 Architecture: ppc64el Maintainer: Debian Science Maintainers Installed-Size: 13069 Depends: libc6 (>= 2.35), libffi8 (>= 3.4), libgcc-s1 (>= 3.3.1), libreadline8 (>= 6.0), libstdc++6 (>= 11), libtcl8.6 (>= 8.6.0), zlib1g (>= 1:1.2.0), python3:any, python3-click, yosys-abc (>= 0.32-1) Recommends: xdot Homepage: https://github.com/YosysHQ/yosys Priority: optional Section: electronics Filename: pool/main/y/yosys/yosys_0.33-5~bpo12+1_ppc64el.deb Size: 2733576 SHA256: 9ef511be82755bfaff4cccee139635f69a982324a515e38edce09ddcda694249 SHA1: 208d43f86250f65d536112f3ae31e3bdb299938c MD5sum: 60f4384c59f332635455fd1c33bf2318 Description: Framework for Verilog RTL synthesis This is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains. . Yosys can be adapted to perform any synthesis job by combining the existing passes (algorithms) using synthesis scripts and adding additional passes as needed by extending the yosys C++ code base. Package: yosys-abc Source: yosys Version: 0.33-5~bpo12+1 Architecture: ppc64el Maintainer: Debian Science Maintainers Installed-Size: 18472 Depends: libbz2-1.0, libc6 (>= 2.34), libgcc-s1 (>= 3.3.1), libreadline8 (>= 6.0), libstdc++6 (>= 11), zlib1g (>= 1:1.1.4) Breaks: yosys (<< 0.32-1) Replaces: yosys (<< 0.32-1) Homepage: https://github.com/YosysHQ/yosys Priority: optional Section: electronics Filename: pool/main/y/yosys/yosys-abc_0.33-5~bpo12+1_ppc64el.deb Size: 5657272 SHA256: d28d9d2f1680bc46423d6dddadf66bf37b454c045b449a8e968976ad7500e093 SHA1: 2223e14ad5cf9120b94c2ade66002c87aae6df14 MD5sum: b84bbc04c31933897166cefd0449866a Description: Sequential Logic Synthesis and Verification Algorithms ABC is a system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. It combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification. . This is a fork of berkeley-abc maintained by the YosysHQ team for use in the yosys RTL synthesis framework. Package: yosys-abc-dbgsym Source: yosys Version: 0.33-5~bpo12+1 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Science Maintainers Installed-Size: 26320 Depends: yosys-abc (= 0.33-5~bpo12+1) Priority: optional Section: debug Filename: pool/main/y/yosys/yosys-abc-dbgsym_0.33-5~bpo12+1_ppc64el.deb Size: 23170576 SHA256: bdc3281fc1dd3d98c083756259b2549183b9ff7dfb63e26d60035a8f58f538d4 SHA1: d856ccf80527739ebb403642948e1398207c73b0 MD5sum: 2b708827e4bf934f87cf862585a08266 Description: debug symbols for yosys-abc Build-Ids: 8e9599a5cdef87968c3718a7501875f6d35eef3e Package: yosys-dbgsym Source: yosys Version: 0.33-5~bpo12+1 Auto-Built-Package: debug-symbols Architecture: ppc64el Maintainer: Debian Science Maintainers Installed-Size: 58801 Depends: yosys (= 0.33-5~bpo12+1) Priority: optional Section: debug Filename: pool/main/y/yosys/yosys-dbgsym_0.33-5~bpo12+1_ppc64el.deb Size: 51534812 SHA256: ef1062dccec217f08908d4221e89f0364cb1d785455c387ba840342544e489fd SHA1: 6e8082857aeb79b18765866ed749c2ed09746708 MD5sum: c4c999a2bbca88daad1753ff928378ca Description: debug symbols for yosys Build-Ids: 323417eb06f45114442219cbff642acd875b8710 f2e509c070777f3b2ca2ccacd0e9b3632c79f716 Package: yosys-dev Source: yosys Version: 0.33-5~bpo12+1 Architecture: ppc64el Maintainer: Debian Science Maintainers Installed-Size: 506 Depends: tcl-dev, libffi-dev, libreadline-dev Homepage: https://github.com/YosysHQ/yosys Priority: optional Section: electronics Filename: pool/main/y/yosys/yosys-dev_0.33-5~bpo12+1_ppc64el.deb Size: 102112 SHA256: c7821ab200665a3312145214d6ed16e62e0d3f7f2443f7d4fe68577a8a4c9de1 SHA1: 917ed96ad32a3c9d6d22d947440c8e382b7c41c4 MD5sum: 7e86003d92243b5ffeac4ee67af53411 Description: Framework for Verilog RTL synthesis (development files) Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains. . Yosys can be adapted to perform any synthesis job by combining the existing passes (algorithms) using synthesis scripts and adding additional passes as needed by extending the yosys C++ code base. . This package contains the headers and programs needed to build yosys plugins. Package: yosys-doc Source: yosys Version: 0.33-5~bpo12+1 Architecture: all Maintainer: Debian Science Maintainers Installed-Size: 2179 Suggests: yosys Multi-Arch: foreign Homepage: https://github.com/YosysHQ/yosys Priority: optional Section: doc Filename: pool/main/y/yosys/yosys-doc_0.33-5~bpo12+1_all.deb Size: 2043192 SHA256: 34143f2c89dca9e6bdae51d9a4d78e2cf1c020c6efaefecf216c3413b581cea3 SHA1: 5918f53c66cc28806b5cdcf7fca3f0a35922925a MD5sum: 40e8528fd1b6a544e12702feea756483 Description: Framework for Verilog RTL synthesis (documentation) Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains. . Yosys can be adapted to perform any synthesis job by combining the existing passes (algorithms) using synthesis scripts and adding additional passes as needed by extending the yosys C++ code base. . This package contains the manual.